Commit Graph

5 Commits

Author SHA1 Message Date
Dawid Niedzwiecki 164e4b6fa3 clock_control: stm32f4: add PLLR division factor
Some STM32F4xx chips have an R division factor in PLL. Add possibility
to configure that.

Even though the output from the R division is not used, it can be
increased to reduce power consumption.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2024-01-08 12:33:36 +01:00
Erwan Gouriou 3c70b7cae7 dts: bindings: clocks: Fix typo stm32f4 pll binding
This is F4 Main PLL description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-03-01 08:56:05 +01:00
Fabio Baltieri eb0a524972 yamllint: indentation: fix dts/bindings/
Fix the YAML files indentation for files in dts/bindings/.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-04 14:23:53 +01:00
Chris Friedt 83bea9a796 dts: bindings: clean up redundant required false attributes
DTS property attributes are (by default) not required.

Explicitly specifying `required: false` is redundant.
Perhaps a warning to that effect would be useful.

Signed-off-by: Chris Friedt <cfriedt@meta.com>
2022-11-20 13:12:44 -05:00
Erwan Gouriou f4b130ae29 dts/bindings: clocks: Add new STM32 clock bindings
Add dts bindings for new STM32 clock nodes.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00