Commit Graph

6 Commits

Author SHA1 Message Date
Pisit Sawangvonganan bdfcd30513 dts: bindings: clock: fix typo
Utilize a code spell-checking tool to scan for and correct spelling errors
in all files within the dts/bindings/clock directory.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-30 18:50:08 -05:00
Fabio Baltieri eb0a524972 yamllint: indentation: fix dts/bindings/
Fix the YAML files indentation for files in dts/bindings/.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-04 14:23:53 +01:00
Erwan Gouriou 1fef42a641 dts: bindings: stm32f1 clocks: Add USB/OTG prescaler on F1 PLL bindings
Prepare F1 PLL bindings to allow configuration of USB clock direclty
from rcc node.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-12-22 14:43:26 +01:00
Erwan Gouriou 8af5e41f91 dts/bindings/clocks: st,stm32f105-pll-clock.yaml: previd is required
"prediv" property should be required and explicitly set as part of board
clock configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-04-21 14:09:44 +02:00
Erwan Gouriou fc9e72c528 dts/bindings: clocks: Fix stm32f105 pll mul range
PLL mul could be set up to 9.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:02:26 -05:00
Erwan Gouriou 5baffdf182 dts/bindings: clocks: Add STM32F1 PLL bindings
Add PLL bindings for STM32F1 devices.
- Main PLL binding for STM32F1 non connectivity lines
- Main and PLL2 binding for Connectivity lines (F105/F107)

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00