The way the build system works, the Makefiles under ext/hal/* are being
included unconditionally, so anything they add to the build flags needs
to be protected by the correct configuration value.
Change-Id: I238e04cd836dd9e4c5d83040822039c68abb6b17
Signed-off-by: Iván Briano <ivan.briano@intel.com>
tests: power_states app updated to support SoCWatch collection
Add CONFIG_SOC_WATCH option for enabling the SoCWatch
QMSI driver and associated instrumentation hooks.
Bug fix for soc_watch.c to use local irq_lock/unlock
This will be put into QMSI as well.
JIRA: ZEP-1121
Change-Id: I0514324e81ca02c1d01ffc2d6cf4d31aee491544
Signed-off-by: Jon Moeller <jon.moeller@intel.com>
After QMSI 1.3.1 release, qm_dma is no longer a hard dependency for
qm_i2c. Fix our build system to reflect that change.
Change-Id: I3646bc519721a5aa18e8db5d2497d7a2550241ca
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Update to QMSI 1.3.1 release.
The only build fix needed was due to the split of the I2C ISR on
qm_isr.h .
Change-Id: Ide7a1537572c72981ec3283dc5cf0d543d9ac7d1
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Enabling the power management features in QMSI requires passing the
ENABLE_RESTORE_CONTEXT definition to both the build of QMSI and to
every inclussion of a QMSI header.
Add the necessary -D flag to the Zephyr build when
CONFIG_SYS_POWER_DEEP_SLEEP is defined.
Jira: ZEP-995
Change-Id: If6ce5985a372a499c63dbbbb9efed49af5fc75b2
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Building QMSI to be used inside Zephyr requires that the build flag
ENABLE_EXTERNAL_ISR_HANDLING be defined, so QMSI knows not to treat
IRQs by itself. However, setting that in subdir-ccflags in the QMSI
directory makes the flag available only during the QMSI build.
Put the definition in KBUILD_CPPFLAGS so it's also available to users
of QMSI, regardless of whether it's the internal build or used as an
external library, and so that definitions protected by this flag match
between what's built and what is seen through header inclusion.
Jira: ZEP-1030
Change-Id: Ifd4af2ab4bdf741269cdd732b48e00e5656e65fe
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_USB_BASE is renamed to QM_USB_0_BASE;
- parameter int_en from qm_uart cfg struct was removed;
- driver's folder now has a new structure, fix makefiles accordingly;
- QM_WDT_MODE and related renamed to QM_WDT_CR_RMOD;
- QM_SCSS_AON renamed to QM_AONC.
Change-Id: Iffe9c66b7a3f2fe64418326e20ff0894149b3044
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Fix a compilation warning. Compilation of the i2c driver
requires QMSI dma object file. As a solution, the current
code has "selects DMA_QMSI" in i2c Kconfig. This results
in a compilation warning since "select DMA" is also
required. Adding "select DMA" and "select DMA_QMSI"
together in i2c Kconfig can solve the compilation issue.
But, this will cause the dma driver be unnecessarily
enabled. So, the solution is to fix the issue in the QMSI
part instead of in the shim driver.
Jira: ZEP-777 ZEP-778
Change-Id: Id4c1f749bf71eece1e70583bd586a69b596768b2
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Update the built-in QMSI build to add qm_flash.c into the default
build due to that the clk.c from QMSI 1.1.0 added a new dependency
on qm_flash file.
(https://gerrit.zephyrproject.org/r/#/c/4000/3/ext/hal/qmsi/drivers/clk.c)
Jira: ZEP-703
Change-Id: I9f64e308cec21477a9b96183dec9ecca37ead373
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Disable tx fifo empty interrupt at the completion of a receive
transfer. If the API caller does not send "STOP" at the end of
a receive transfer, unnecessary tx fifo empty interrupt will
come one by one endlessly.
Jira: ZEP-556
Change-Id: I54739459dfab81c28713f6a3c77789e7903bb7f9
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This was merged prematurely.
This reverts commit 758355779c.
Change-Id: I19d27df0b9ea9acf49382d27b5ef6ce49b915542
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The parent commit for this was merged prematurely.
This reverts commit d38208b977.
Change-Id: I4f05f303eac7bdf176fb0522e30eabb839602b25
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Disable tx fifo empty interrupt at the completion of a receive
transfer. If the API caller does not send "STOP" at the end of
a receive transfer, unnecessary tx fifo empty interrupt will
come one by one endlessly.
Jira: ZEP-556
Change-Id: I311aba843e28685e8cca36733ac3f1e09b70d900
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
QMSI provides functions to set the SOC into its various power states,
and for Quark SE it also allows to control the voltage regulator, but
the files with these functions were not being built.
Change-Id: I40f08cdc970eb6696bc5f1d6cd0c407f64bec754
Signed-off-by: Iván Briano <ivan.briano@intel.com>
This is fixed in QMSI 1.1 already and this patch can be reverted when
the next released is merged into Zephyr.
Original commit message:
While performing power measurements in LPSS, it appeared that the value
for LPSS registers was incorrect. Fix this value to enable proper entry
in LPSS mode.
Change-Id: Ie6a4aa5c9aa01ebaad0cd2db722bb9b5c87df5e7
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Signed-off-by: Iván Briano <ivan.briano@intel.com>
QMSI provides more than just peripheral drivers, and it may be used
from the SOC or by applications that need finer grained control of the
platform.
This also makes the QMSI HAL consistent with the others.
Change-Id: I27490c98ccf1c1afcc090ce1e65f0e066eddc777
Signed-off-by: Iván Briano <ivan.briano@intel.com>
QMSI 1.1 Beta is available on Github:
https://github.com/01org/qmsi/releases/tag/v1.1.0-beta
Update the QMSI drop we maintain in Zephyr and
keep the modification to qm_soc_regs.h introduced on commit
6b88a6b945 "ext qmsi: Add USB base and interrupt defines" since
that patch hasn't made into the QMSI 1.1-Beta release in time.
Also, fix the build where needed:
- add hard dependency from qm_i2c to qm_dma
- fix spi_qmsi_ss.c due to new parameter naming
- fix adc_qmsi.c and adc_qmsi_ss.c due to a new parameter
Change-Id: I01388c787f5ee6ee97fece2e42b24a717522207f
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
This commit should be reverted when these changes will become part of
QMSI 1.1 release.
Change-Id: I4cc91a10515906e3863bb9be59dbead53bd4a938
Signed-off-by: Adrian Bradianu <adrian.bradianu@windriver.com>
Add DMA shim driver based on QMSI 1.1
In order to enable this driver, the following options must
be set.
CONFIG_DMA
CONFIG_DMA_QMSI
Jira: ZEP-354
Origin: Original
Change-Id: I604cbf34e90f7653b956a6e4d428424beee3ef87
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
For CMSIS we now have HAS_CMSIS which needs to be added to the
SoC definition.
Instead of changing the main Makefile we now include a sub-Makefile
with all related header and library paths that are hosted in
ext/
Move redifintion of LIB_INCLUDE_DIR later to get variables defined
in Makefile.toolchain.*
Change-Id: I9f90f90247c2a66b4565427b89d4e1d4dd5c9622
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add missing Kconfig files and connections to expose Kconfig options
in ext/ directories. Fixup QMSI to only be exposed on platforms that
utilize it.
Change-Id: I6c6c5011b2bf2966f65aa8279dc594a244821956
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is external source code maintained somewhere else. Put it
under ext/ for clarity and maintainability.
Change-Id: I9e7c9d0948a2ba893006e316dc21d9b1a9edfa93
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Iván Briano