Flashing issues have been resolved. The build system support for
flashing and debugging has been changed back to UFM scenario.
XIP and reset vector no longer disabled. Wiki documentation updated.
Change-Id: Iffe326485c20808dabc1e19e0b18b7b60a83d797
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For both of these, we send the .elf binary over the JTAG and it gets
written directly into SRAM. The CPU boots the image from the entry
point (__start).
This does not provision the kernel onto device's User Flash Memory
(UFM). Implementation of this is still in progress see ZEP-273.
Change-Id: Iae8188a21e4a3eecfda0f4f0bb220c0607d719cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For the moment, NIOS2_CPU_SOF must be set with the path to the
CPU configuration. We are checking with Altera on whether we
can directly check in the binary to the source tree.
These scripts depend on tools provided by the Altera Quartus
Prime Lite Edition. This is available for free but requires
registration on Altera's website to obtain.
Change-Id: Ia6cb6c9e43c3e141807a887cb25c47b370a7d8e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Andrew Boie