Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
A previous re-work of IRQ priorities was led astray by an incorrect
comment. Priority level 1 is not a non-maskable interrupt priority.
In addition, zero latency IRQs are not implemented on ARC.
Timer driver now doesn't specify IRQ_ZERO_LATENCY (as that wouldn't be
correct) and its IRQ priority is now tunable in Kconfig. The default is 0.
IPM driver on both ARC and x86 side were being configured with hard-coded
priority of 2, which wasn't valid for ARC and caused an assertion failure.
The priority level is now tunable with Kconfig and defaults to 1 for ARC.
Issue: ZEP-693
Change-Id: If76dbfee214be7630d787be0bce4549a1ecbcb5b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Tickless idle is not yet supported. We program the timer period
to the desired system clock tick rate (sys_clock_hw_cycles_per_tick).
This was renamed to the same name used in the Altera Embedded IP
Peripherals Guide; used by other CPUs than Nios II.
Change-Id: Ic4fca8c16b923295b77b63f98f45cd3483c5f560
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.
This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.
Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
On NANOKERNEL level only of course. Some devices, initialized at this
level, may require to get the clock running already.
Change-Id: Id2dd830d915474aac6c080068c2cf356cf841e0c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The HPET reads its frequency at runtime, and thus must set all relevant
global constant values at runtime as well.
Change-Id: I965102bbdcea370297d5a2bbe14177ec0d0d3794
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Some timer devices, such as the HPET, read their frequencies at runtime.
All global constant values must be set at runtime in that case.
Change-Id: I408babce6deb857748a87691132d7e27e88f0bb8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Do not depend on environment variables and use a kconfig variable
for defining the architecture.
In addition, remove the X86_32 variable, it just duplicates X86 for
not good reason, at least until start supporting MCUs with 64bit.
Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This module is based on the standard Local APIC and IO APIC source modules.
This modules combines these modules into one source module that exports the
same APIs defined by the Local APIC and IO APIC header modules. These
routine have been adapted for the Quark D2000 Interrupt Controller which has
a cutdown implementation of the Local APIC & IO APIC register sets.
Change-Id: Ic80aa78918483663d76054ebadefa08d8a3f188a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The PIT is an unsupported device. On x86 based platforms, the LOAPIC_TIMER and
HPET_TIMER are the only supported timers.
Change-Id: Ic890838c811b7eb62008aef0c8a92786f1579217
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Creating the LOAPIC timer Kconfig options permits future commits to remove
those settings from the relevant board.h files.
NOTE: No defconfig files have been modified as the LOAPIC_TIMER configuration
option is not enabled in any of them.
Change-Id: I7d97ed089cd4b734566b698183be95d3a166d71f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Adds additional Kconfig options to the HPET timer for setting its base address,
IRQ, IRQ priority and condition for triggering an interrupt.
Change-Id: I80349c60237380129da9ef41ccf6850c6b874c3c
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The name of the device is SYSTICK. The device name should be part of the
file name, like all other timer drivers we support. The name
'cortex_m_timer' said nothing about which device the driver is for, since
it's way too generic: it could be for any timer present on any Cortex-M
board.
Change-Id: I39b4f79c32516ec9aff82c55c0ca639fad1b52bb
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Qemu implements HPET so that it is connected to IRQ 2, which makes
necessary to use it in legacy emulation mode.
Add legacy emulation mode to HPET driver.
Change the way the HPET driver is initialized. QEMU requires that
the mode (one shot or periodic) gets set prior loading comparator
value.
Add debugging mode to HPET driver to ease the next port.
Change-Id: I668325d5968451585519a08b6c41863cf6e37f88
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Updates the timer driver dependencies to simplify the selection of a timer
driver. The timer driver menu only lists those drivers that are compatible
with the previously selected interrupt controller.
Change-Id: I5deea315f7c373c6660bacc411c6374e7b0ae84d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The LOAPIC_TIMER_FREQ Kconfig option is not used.
Change-Id: I919fd2128f667e0b91467cb542041449738dd992
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Adds the Kconfig option for selecting the Cortex-M systick timer. This helps
pave the way for moving the Cortex-M systick timer into the drivers/ directory.
Change-Id: Iee040083a425c9c1dbc5973991b89239e0a72eee
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit standardize the Kconfig inclusion.
Selective sourcing of Kconfig files create conflict when merging
different configuration files (.config files).
Instead, now each kconfig symbols is dependant of its specific
DRV_* driver ksymbol.
Change-Id: I3d20d108a83f00d34067dc334758fd57e51feecf
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This commit add license headers to Kconfig files.
Change-Id: I79e60263b8c7b696463ecc84b8ad411af5415117
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This commit adds the Kconfig files that describe the CONFIG
symbols that belongs to the drivers directory and subdirectories.
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Change-Id: I924835ece11a3d597e77a55ace21d724dd5ddbe5