PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Update to QMSI 1.3.1 release.
The only build fix needed was due to the split of the I2C ISR on
qm_isr.h .
Change-Id: Ide7a1537572c72981ec3283dc5cf0d543d9ac7d1
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
This commit updates the i2c_qmsi driver by removing the temporary Zephyr
save/restore context implementation and using the new QMSI APIs.
Jira: ZEP-996
Change-Id: I9fbd563f214b757f3435037b3e24da4bcf08da14
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Put the clk_perih_enable() call outside of the switch statement so it
actually runs.
Jira: ZEP-1048
Change-Id: Iee8efb4430d37dc74ce48f249bbf58d53125b520
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
In order to restore i2c context after entering
SYS_PM_DEEP_SLEEP, suspend and resume functions
are called.
The following parameters are restored:
- All registers for the I2C device.
- I2C clocks.
I2C depends on the DMA which is enabled separately.
The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.
Change-Id: I22ca2fb9884109f7b5ca75af572811187a531403
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Fix i2c failure while multiple slaves are connected to the
same i2c interface. Higher load on the i2c bus makes i2c
signal less nice. The requirement for signal ramp up and
ramp down time needs to be loosened.
Jira: ZEP-646
Change-Id: If698d7ba741788857694f166ecc602c2a94cb12e
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Drivers that implement power management should use the preferred
device_pm_ops method instead.
Change-Id: I9ae06e26b77325265bbe46bdee82ba39dedb6b79
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The idle status check before a i2c transfer is not a reliable
way to check whether i2c master is ready to transfer data. If
the data transfer for the previous API call is done, but, a
stop condition is not sent by the previous API, the i2c master
is not idle, but, it can start new data transfer.
Change-Id: I93dbf46cef6272f3da69a0d67fb737c9b480791f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Fix a bug in i2c_qmsi_transfer function in the shim driver.
The function did not wait for the completion of a msg transfer
before starting another msg transfer. Similar issue exists in
the i2c sensor shim driver. It is also fixed.
Change-Id: I1f8ad2281fa185d85db25a4682ed596c02ea322e
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Do not use the QMSI specfic define, use the one define in the
i2c API instead.
Change-Id: I979673e35060d041cb97f4de178069e2bdfd2c7b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The locking and synch mechanisms were configured after the interrupts
for the I2C controller are enabled, now the configuration is done before
the enabling of the interrupts.
Jira: ZEP-419
Change-Id: Ia1b0e790b9f5f8e7560cc3556b7a0f394048d171
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This will allow the driver to be safe from fibers and task
Change-Id: I6c4c4fc387cf334f0287b8a02982be1941a311fd
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This patch extends the i2c shim driver so it supports the 'default
configuration' infrastructure which enables the user to specify a
default configuration for the I2C device. The default configuration
is set during driver initialization.
This patch also changes Quark SE and D2000 Kconfig.defconfig files so
the i2c default configuration is set to '0x12' which means standard
bus speed, 7-bit addressing and master mode. This is the same value
used when DW driver is selected, by the way.
Change-Id: I06e0dc3c29e8da2f3317db5bef285177f2e92c9a
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: Iab10655c6fc6f17c0c6dd49cb7a4e74fabcf852c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch fixes the gpio, i2c and watchdog shim drivers so they set the
CLK_PERIPH_CLK bit during driver initialization. Differently from Quark
SE, the peripheral clock gate bit (CLK_PERIPH_CLK) is not enabled by
default in Quark D2000. We have to explicitly set this bit in order to
properly initialize the device.
This issue has been masked so far because the CLK_PERIPH_CLK bit is set
when UART NS16550 driver is enabled. The UART NS16550 driver is enabled
by default for Quark D2000 so gpio, i2c and watchdog sample apps were
working just fine. But if we disable the NS16550 driver, these samples
applications stop working.
The remaining shim drivers already set the CLK_PERIPH_CLK bit during
initialization so there is no need to fix them.
Change-Id: I3f658da564f87e9d52092ce7aac423c7b3e0c890
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_NO_SUPPORT by
-ENODEV at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I03007527367b03e6fd72a85004b7d3b81046a6a6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_USED by -EBUSY
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I21eb3ffe9bdfde98593dcf63c50a8bdcd376e49e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_CONF by
-EINVAL at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_OP by
-ENOTSUP at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I46aec3c65963018c479b01602e4a3eec8650eaff
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_FAIL by -EIO
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I0594ab5dbe667e074c250129e7c13ce512ac940f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch fixes the QMSI I2C shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in i2c_qmsi_init() because the macro QM_I2C_1
is not defined in QMSI headers from Quark D2000.
Since this drivers is now properly tested with Quark D2000, this patch
sets the QMSI driver default options in arch/x86/soc/quark_d2000/Kconfig.
It also adds the wiring information required to test the i2c_lsm9ds0
sample app in the Quark D2000 CRB.
Change-Id: I4be03c09304da5a66ac663e48b1d72225eb5651d
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Due to an issue with the interrupt-based transfer API from QMSI driver,
the 'transfer' callback from the shim driver (i2c_qmsi_transfer) is
implemented with polling APIs. This is not ideal because we are not able
to sleep the current thread (so another task can be scheduled in) while
the i2c operation is carried out.
The interrupt issue with the QMSI driver has been solved then this patch
fixes the shim driver so it uses the interrupt-based API and adds extra
code to handle the thread synchronization.
Finally, this patch also moves all 'struct device' related definitions
from the bottom to the top of the i2c_qmsi.c file so the DEVICE_GET
macro can be used in transfer_complete() and removes the init.h include
since it is not needed anymore.
Change-Id: I7ef7ce4cea6fcc939e310e5fe12c406645f6a16e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Currently, the I2C QMSI shim driver supports only the "I2C 0"
controller instance. This patch extends the driver so it supports
the "I2C 1" instance as well.
The controller instances can be enabled independently.
Change-Id: Ieb64df46816026f3f4fb262a1682c98ee36bedd5
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
In the initial version of the I2C shim driver, the i2c clock gate was
enabled within i2c_qmsi_configure(). After some review rounds we decided
to move it to i2c_qmsi_init() but missed to remove the clk_periph_disable
call within i2c_qmsi_configure(). So this patch removes it.
Change-Id: Id45dba2e00a5649846d305399bc1b2b275063cb6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch introduces the QMSI I2C driver which is simply a shim driver
based on I2C driver provided by QMSI BSP.
This initial version supports only I2C_0 controller in 'master' mode.
Due to some issues with qm_i2c_master_irq_transfer API, the driver uses
the polling APIs from QMSI. This means that the current thread doesn't
sleep (i.e. is not scheduled out) while the I2C transfer is carried out.
The qm_i2c_master_irq_transfer() issue is under investigation.
Below follows the missing features which will be addressed by a new
version of this patch or by upcoming patches.
* Block the current thread until the I2C operation has actually
completed.
* Add support for multiple controllers.
* Add support for slave mode.
* Add support for suspend() and resume() APIs.
In order to enable this driver, the following options should be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory"
CONFIG_I2C=y
CONFIG_I2C_QMSI=y
Finally, due to the lack of proper support for Quark SE in QMSI 1.0.0,
this driver requires QMSI version greater than 1.0.0.
This driver has been tested only with Quark SE based boards.
Change-Id: I369992c7b5fe37f7e0b45be7f19e667ad1fca9ac
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Baohong Liu