Commit Graph

45704 Commits

Author SHA1 Message Date
Christopher Friedt bb7c58f65e ieee802154: cc13xx_cc26xx: workaround for issue in ti driver
This is a temporary workaround for an issue in TI's RF Driver
API. A subsequent release of the SimpleLink SDK will mitigate
the need for it and it can be reverted when hal/ti receives
that update.

Fixes #29418

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-11-03 11:03:35 +01:00
Christopher Friedt 8e2978d577 drivers: ieee802154: cc13xx_cc26xx: use ti rf driver api
This change reworks the cc13xx_cc26xx IEEE 802.15.4 driver to use
the TI RF driver API that is available in modules/hal/ti.

There are a number of benefits to using TI's API including
 - a stable multi-OS vendor library and API
 - API compatibility with the rest of the SimpleLink SDK and SoC family
 - potential multi-protocol & multi-client radio operation
   (e.g. both 15.4 and BLE)
 - coexistence support with other chipsets via gpio
 - vetted TI RF driver resources, such as
   - the radio command queue
   - highly tuned / coupled RTC & RAT (RAdio Timer) API

Fixes #26312

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-11-03 11:03:35 +01:00
Scott Worley 177ea9316c boards: mec: mec15xxevb, mec1501modular: Update documentation
Update documention to refer to MEC152x specifications and
SPI image generator. MEC152x is the actual production SOC.
The only difference is the Boot-ROM loader SPI image layout.
Preserve the link to the old, MEC1501 SPI image generator.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2020-11-02 18:44:36 -05:00
Kumar Gala 5099097102 west.yml: Pull in build fix for NXP IAP flash driver from HAL
The HAL was missing some new files for the IAP driver which causes build
failures.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-11-02 14:46:20 -06:00
Anas Nashif 03de10091a clang: use LLVM_TOOLCHAIN_PATH instead of CLANG_ROOT_DIR
Be consistent with other toolchains.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 7fe8198102 llvm: add support for building x86_64-pc
set triplet for 64bit x86.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 3219710c34 boards: qemu_x86: enable llvm toolchain
Make this board buildable with llvm.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 39bd354389 clang: remove cache handling
This is taking too long for every run and does not seem to work as
expected and wastes time instead of saving it. Remove for now..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 8f7f31b654 clang: do not assert on libgcc not found
We do not need libgcc always, some environments do not have libgcc and
do not require it, so keep it more flexible.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif 6e418c7022 clang: remove include-fixed inclusion
This directory does not exist in clang/llvm, remove it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif e6e29c0ccf toolchain: clang: add -Wno-typedef-redefinition option
Without the -Wno-typedef-redefinition option, clang complains if a
typedef gets redefined in gnu99  mode (since this is officially a C11
feature).

While new versions of GCC do not seem to issue this warning in gnu99
mode anymore. So some existing code with typedef redefined which works
well with GCC will issue this warning.

Similar to what was done in 2354f055ec.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Anas Nashif efebf3fb64 toolchain: make clang happy with inline asm
clang did not like %p on x86, make it use %c.

Did not explore why this is happening..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Martí Bolívar 808dd9e684 doc: reference: add devicetree bindings content
Add generated documentation content for known devicetree bindings
using the Binding abstraction which was just added to edtlib. This
works similarly to the way Kconfig content is generated, so extract a
bit of common helper code for doing that out and rename the relevant
files to keep the distinction clear.

Make the documentation build system respect a preset DTS_ROOT. In this
way, out of tree bindings can be added to the generated content by
telling the documentation build system where to find them, identically
to how out of tree bindings can be added to a Zephyr application.

Similarly, make the output directory configurable.

Fixes: #28865
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-11-02 14:26:33 -05:00
Martí Bolívar 2c19cccd4b scripts: edtlib: bindings_from_paths() helper function
This is a convenience function for creating a bunch of Binding objects
from files in a directory.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-11-02 14:26:33 -05:00
Martí Bolívar 5d74da4681 dts: update vendor-prefixes.txt
Make the formatting consistent and add a missing prefix we are using.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-11-02 14:26:33 -05:00
Martí Bolívar ee52887089 doc: devicetree: reorganize a bit
Rework some section titles and separate the API into its own sub-page
in the reference section.

This is prep work for adding generated reference material on
devicetree bindings.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-11-02 14:26:33 -05:00
Peter Bigot 758c8b34b1 tests: kernel: work_queue_api: relax test to eliminate racy checks
We can't control ticks accurately enough to detect the transition
between on a queue and being handled, so relax the checks to make
things pass.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-02 14:25:21 -05:00
Anas Nashif be1025a736 sanitycheck: handle overflow skips
skips due to ram/rom overflow were captured as failures. Fix this and
count them correctly as skips.

Fixes #29412

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:21:55 -05:00
Anas Nashif 5a6e64f448 sanitycheck: count skipped tests due to overflow
Count tests that were skipped due to SRAM/RAM overdlow as skipped.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:21:55 -05:00
Alexander Kozhinov a142e7b18c samples: civetweb_websocket_server: init project
initialize this project by adding corresponding project files

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-02 20:20:00 +02:00
Anas Nashif 196ae3506f doc: fix showing latest version in sidebar
Minor fix for showing latest version in sidebar, no need for link here
that was added in recent commit.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 19:02:29 +01:00
Yuguo Zou d24c6e5aae arch: arc: use ifdef to replace if define in isr wrapper code
isr wrapper code has mixed usage of #ifdef and #if define macros. Unify
them to more usual #ifdef.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-11-02 11:02:47 -06:00
Yuguo Zou dbd431d2bc arch: arc: fix a reg misuse in leaving tickless idle
There is a register misuse in leaving tickless idle code, which would
destroy exception/interrupt status. This commit fix this issue.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-11-02 11:02:47 -06:00
Ryan Holleran 99530e68e5 samples: sensor: fxos8700: Add frdm_k22f as a compatible platform
The frdm_k22f has the FX0S8700CQ placed. Add the frdm_k22f to the
FXOS8700  sample application.

Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
2020-11-02 10:29:41 -06:00
Ryan Holleran 807d8aa87b boards: frdm_k22f: Correct FXOS8700 i2c address
The address in NXP's documentation shows that 0x1c is the addressfor the
FXOS8700.

Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
2020-11-02 10:29:41 -06:00
Armando Visconti 667db2db88 drivers/sensor: lsm6dsl: Fix build when irq_gpios is not in DT
In case of h/w setup with multiples device instances it is possible
that some of them wants to use triggers but not the others (no
interrupt line.

Since Kconfig configuration is the same way for all the instances
(CONFIG_LSM6DSL_TRIGGER=y), the driver behaves differently according
to how the device instance has been configured in the DT.
If irq-gpios is present, then the driver initialize the interrupt
part, else it skip irq init and returns ok, but data->gpio != NULL
xis checked in trigger_set() API.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-11-02 10:00:07 -06:00
Stephane D'Alu 61b0009bdf sensor_shell: added missing sensor channel.
Synchronized with list of channel defined in sensor.h

Signed-off-by: Stephane D'Alu <sdalu@sdalu.com>
2020-11-02 09:52:54 -06:00
Erwan Gouriou 199cf5668b boards: stm32: Move USB pins to device tree configuration
Move STM32 based board USB pin configuration to device tree.

Exceptions:
* olimex_stm32_h407: Node not enabled and not documented.
Signal added in disabled node.
* L0/G4 based boards as signals are not available yet.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-02 09:17:09 -06:00
Ioannis Glaropoulos f530db0525 doc: mention the INIT_ARCH_HW_AT_BOOT functionality in the rel notes
Mention the newly introduced funtionality for Cortex-M
architecture to force the early-boot initialization of
internal architecture HW state.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-02 15:02:24 +01:00
Ioannis Glaropoulos 071ab4a6d5 zephyr: make images loaded by MCUboot enable arch core HW regs init
Instruct Zephyr images that are loaded by MCUboot to
force the initialization of architecture core HW registers,
if the architecture supports the functionality.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-02 15:02:24 +01:00
Ioannis Glaropoulos 47e87d8459 arch: arm: cortex_m: implement functionality for ARCH core regs init
Implement the functionality for configuring the
architecture core registers to their warm reset
values upon system initialization. We enable the
support of the feature in the Cortex-M architecture.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-02 15:02:24 +01:00
Ioannis Glaropoulos 89658dad19 arch: arm: aarch32: cortex_m: improve documentation of z_arm_reset
We enhance the documentation of z_arm_reset, stressing that
the function may either be loaded by the processor coming
out of reset, or by another image, e.g. a bootloader. We
also specify what is required at minimum when executing the
reset function.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-02 15:02:24 +01:00
Ioannis Glaropoulos 20a9848230 arch: introduce option to force internal architectural state init
We introduce an option that instructs Zephyr to perform
the initialization of internal architectural state (e.g.
ARCH-level HW registers and system control blocks) during
early boot to the reset values. The option is available
to the application developer but shall depend on whether
the architecture supports the functionality.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-02 15:02:24 +01:00
Carlo Caione b3ff89bd51 arch: arm64: Remove _BIT suffix
This is redundant and not coherent with the rest of the file. Thus
remove the _BIT suffix from the bit field names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione 24c907d292 arch: arm64: Add missing vector table entries
The current vector table is missing some (not used) entries. Fill these
in for the sake of completeness.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione f0b2e3d652 arch: arm64: Use mov_imm when possible in the start code
Instead of relying on mov.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione 673803dc48 arch: arm64: Rename z_arm64_svc to z_arm64_sync_exc
The SVC handler is not only used for the SVC call but in general for all
the synchronous exceptions. Reflect this in the handler name.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione e738631ddf arch: arm64: Fix indentation
Fix indentation for the ISR wrapper.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione 78b5e5563d arch: arm64: Reword comments
Fix, reword and rework comments.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Carlo Caione 9e897ea2c3 arch: arm64: Remove unused macro parameters
Remove z_arm64_{enter,exit}_exc parameter leftovers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-02 12:04:35 +01:00
Ehud Naim 89928c3c8b net: dhcpv4: check dhcpv4 msg len is correct
check if dhcpv4 msg len is correct and drop it otherwise

Signed-off-by: Ehud Naim <ehudn@marvell.com>
2020-11-02 12:56:16 +02:00
Lingao Meng 5efe6ff887 Bluetooth: Mesh: Fix set friend_cred flag incorrectly
Only set friend_cred to true when friendship established and
use friend cred security material decryption successfully.

Signed-off-by: Lingao Meng <mengabc1086@gmail.com>
2020-11-02 12:47:36 +02:00
Trond Einar Snekvik a878b36af0 Bluetooth: Mesh: Permit model walk from any model
Fixes bug where applications that disable model extensions end up in an
infinite loop, and adds support for walking model subtrees, as opposed
to forcing root to be unextended.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2020-11-02 12:46:45 +02:00
Henrik Brix Andersen 5803ee1e81 samples: display: cfb_custom_font: add support for ssd1306fb
Add support for the Solomon SSD1306FB device to the CFB custom font
sample.

Convert sample to use DT_LABEL() for obtaining the device label instead
of hardcoding it.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-02 09:40:00 +01:00
Jan Van Winkel cf1bd17804 doc: releases: 2.4: Updated LVGL to 7.6.1
Added release note about update of LVGL to minor version 7.6.1

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2020-11-01 10:51:00 -05:00
Jan Van Winkel cd5c9a6891 tests: lib: gui: Enable new config flags
Enable newly introduced Kconfig flags in LVGL test cases

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2020-11-01 10:51:00 -05:00
Jan Van Winkel 7c8ef52648 lib: gui: lvgl: update to v7.6.1
Update LVGL to minor release 7.6.1

resolves: #29050

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2020-11-01 10:51:00 -05:00
Kumar Gala e4e3ab3cc3 west.yml: Pull in fix for build issues of flexcan driver on imx-rt
Pull in ASSERT/NDEBUG fix similar to what exists on Kinetis for imx-rt.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-30 10:42:48 -05:00
Alexandre Bourdiol c47a5d4a36 drivers: pwm: pwm_stm32.c: enable ARR preload
Enable ARR preload so that period or pulse updates are taken
into account synchronously with update event
(at the end of a ongoing period)
And thus avoid undetermined intermediate pulse.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-10-30 15:59:32 +01:00
Daniel Leung 2d152ab019 kernel: limit thread local storage to Zephyr SDK
Toolchains other than Zephyr SDK may not support generating
code with thread local storage. So limit TLS to Zephyr SDK
for now, and only enable TLS on other toolchains as needed.

Fixes #29541

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-30 15:59:06 +01:00