Commit Graph

31 Commits

Author SHA1 Message Date
Mohamed ElShahawi 21096b0316 esp32: pinmux: Add Device tree support
- Add PINMUX module to esp32.dtsi

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-11-04 19:45:50 +01:00
Mohamed ElShahawi 2d2f4de5b8 drivers: watchdog: esp32: Add Watchdog Device tree support
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree

Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api

Note:
- timer module interrupt registers shall be removed when
timer driver implemented.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-11-04 18:00:36 +01:00
Mohamed ElShahawi 55471982f6 esp32: drivers: Add Entropy Device tree support
- Add TRNG module to esp32.dtsi
- Updated the note about TRNG register address

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-10-24 09:09:41 -05:00
Mohamed ElShahawi 566d07e00c [ESP32] drivers: Add I2C Device tree support
- Add I2C modules to esp32.dtsi
- I2C Pins and bitrate config moved to esp32.dts

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-10-22 08:01:24 -05:00
Yannis Damigos efec7f73b7 dts: esp32: Add GPIO support in DT
Add GPIO support in DT

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-09-25 17:39:42 +02:00
Mohamed ElShahawi 0705be344c drivers: esp32: UART Fix yaml/dts binding name
replace "xtensa" with "espressif", as the latter is the correct
vendor name.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Mohamed ElShahawi 2d035c4191 drivers: esp32: Add UART Driver with FIFO/Interrupt support
- Fixes #3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig

Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts

- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs

- Old Silicon rev is not supported

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Kumar Gala d6e6a2be38 irq: intel_s1000: Fixup IRQ values for multi-level IRQ handling
Remove the handcoded multi-level IRQ values in device tree.  We now are
able to generate the encoded multi-level IRQ value.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Piotr Zięcik e4bd11b3f3 dts: Add information about system bus frequency to the dts
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
Piotr Zięcik 7d56fc35fd dts: Add information about CPU frequency to the cpu nodes
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:

- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
  in order to configure USB clock source.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
Yannis Damigos 3748085d18 dts: intel_s1000: Move core_intc node under soc node
Move core_intc node under soc node

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Yannis Damigos ae781bd9bd dts: Restructure xtensa dts directory
Restructure xtensa dts directory

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Yannis Damigos aa8901c332 dts: xtensa: Fix compatible for xtensa lx6
Fix compatible for xtensa lx6

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 10:07:29 -04:00
Sathish Kuttan 02d49df52f dts: intel_s1000: add low power sram as sram1
Add the 64KB SRAM in low power domain to the SoC device tree

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-06-11 16:36:30 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Savinay Dharmappa 40e0f18e21 dts: qemu_xtensa/xt-sim: Enable device tree support
patch enables dts support for boards qemu_xtensa and xt-sim

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-01 07:49:28 -06:00
Kumar Gala d3623a2fba soc: xtensa: intel_s1000: Encode IRQ in dts
Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-01 04:09:01 -06:00
Savinay Dharmappa 3bec750268 dts: xtensa: esp32: Add device tree support.
add device tree support for esp32

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-01-29 09:47:17 -06:00
Kumar Gala 94e02794f3 dts: intel_s1000: Fix dtc warnings
Fix the following dtc warnings on S1000:

	Warning (simple_bus_reg): /soc/pinmux@81C30: simple-bus unit
	address format error, expected "81c30"

	Warning (alias_paths): /aliases: aliases property name must
	include only lowercase and '-'

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-28 10:42:20 -06:00
Sathish Kuttan 1b1c80256f dts: intel_s1000: add pinctrl to device tree
Add pinctrl node to Intel S1000 SoC device tree for I/O MUX selection

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 23f11933b9 dts: intel_s1000: enable DTS for GPIO
Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-26 06:56:48 -08:00
Savinay Dharmappa cf58f83dd6 boards: xtensa: intel_s1000_crb: Enable SPI Master driver
patch enables SPI Master driver on intel_s1000_crb

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-11-13 18:49:03 -05:00
Sathish Kuttan 45f0917308 dts: intel_s1000: update SRAM size to 4MB
Intel S1000 has 4MB of internal memory.
In DTS it was defined as 3MB and is now updated to 4MB.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-09 20:32:13 -05:00
Daniel Leung c15774bfa3 dts: intel_s1000: fix warning about leading "0x"
This removes the prefix "0x" for sram0 to fix a warning.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 17:52:45 -04:00
Kumar Gala 6e240da26f dts: Use new DT_SIZE_{K,M} macros
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere.  We also have DT_SIZE_M, so use that in a few
places as well.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-15 09:23:07 -05:00
Rajavardhan Gundi e5b0e9ac07 DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-06-11 17:27:58 -04:00
Savinay Dharmappa 76676651f4 dts: intel_s1000: Enable generating IRQ priority.
patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller
Add dts support for multilevel DW interrupt controller

Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 9ee4929d56 dts: i2c: Add dts support for i2c
Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 97f721d928 dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00