We have many testcases doing filtering both on the architecture level
and the platform level, which is redundant. Also many testcases are
running the same test twice on the same SoC for no good reason, cleanup
the tests and cleanup the filtering.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This will prepare test cases and samples with metadata and information
that will be consumed by the sanitycheck script which will be changed to
parse YAML files instead of ini.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I6c676bc6c5e850a8725785554cd535e32067f33e
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ztest has a number of assert style macros and used a baseline assert()
that varies from the system definition of assert() so lets rename
everything as zassert to be clear.
Change-Id: I7f176b3bae94d1045054d665be8b5bda947e5bb0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add pin definitions to enable GPIO cases to run on
Quark D2000.
Add pin definitions to enable GPIO cases to run on
arduino_101_sss.
Change-Id: I97eadb8316b1f80b899b167a01effab815626dae
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
According to ZEP-1717, removing the callback from
the gpio is not enough to disable interruptions.
You also need to call gpio_pin_configure() on
the input pin without the GPIO_INT flag to totally
disable the interrupt for the pin.
This commit will stop level interrupt from being
fired constantly.
Change-Id: I019d7cea0bc0d5e5ff4b74165472ed11de1733bb
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
When test GPIO_INT_EDGE, there is no code to skip GPIO_INT_LEVEL
and jump to the end of the function. So GPIO_INT_LEVEL will
always be checked (Besides, it't always true), even if it's
testing GPIO_INT_EDGE, which will cause GPIO_INT_EDGE cases fail.
Add a goto statement for GPIO_INT_EDGE to skip GPIO_INT_LEVEL.
Jira: ZEP-1685
Change-Id: I10ce21c04c49f34aafdc2cd2f60f3e5377d6f1f5
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
According to include/gpio.h, GPIO_INT_LEVEL is 0,
which means the branch to test GPIO_INT_LEVEL is
always false and GPIO_INT_LEVEL cases will always
pass.
This patch also fixes another minor bug in main.c.
Coverity-CID: 160074
Change-Id: I1fefa978e65bf801f244b4c2960cb87a26b0829e
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
According to Coverity, rand() is a risk function.
So we use another method to generate random value.
Coverity-CID: 160070
Change-Id: Icb7e06cd43cb8bade6596cc37e9d04bfc59e1de7
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To customise test builds and support test related features such as time
stamps and a boot banner, introduce a Makefile variant that is dedicated
to testing.
Initially we introduce a new config overlay that is used for all tests, in
this case we enable BOOT_BANNER and BUILD_TIMESTAMP. This will print the
current version and the date, useful when reporting bugs and also an
indicator that the system has booted before the test has started.
For example:
[QEMU] CPU: qemu32
***** BOOTING ZEPHYR OS v1.6.99 - BUILD: Dec 21 2016 19:57:13 *****
tc_start() - Test Nanokernel CPU and thread routines
Initializing nanokernel objects
...
..
Change-Id: I224318cdeb55a301964ea366dbc577e2e3a09175
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
the commit include 5 ztest cases, cover the basic gpio APIs
including callback relevant and pin read/write functions.
It proves workable on intel quark c1000 and
arduino 101 platform
Change-Id: Iab30aa841cfa440c1f773b5a8c5ce0d68346c353
Signed-off-by: jing wang <jing.j.wang@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Anas Nashif