Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix doxygen comment typos used to generate API docs
Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
You can't query the LOAPIC for every kind of interrupt that fires,
it has no idea about IRQs that were generated by an 'int' instruction
for example. Extend the semantics of _irq_controller_isr_vector_get()
to return -1 if the vector can't be identified.
Issue: ZEP-602
Change-Id: I1174aa62fbedffdcd329d60da8ef14fabb042dc3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
MVIC has only one local interrupt: the timer IRQ. What IRQ line
to use is not fixed, instead it is programmed into the LVTTIMER
register. This is unlike LOAPIC which has a fixed IRQ for the timer
and instead the *vector* to use for it is programmed into LVTTIMER.
We don't want _loapic_int_vec_set() to do anything as the relationship
between IRQ lines and vectors is fixed and we do not want to be
programming vector numbers into bits 0-3 of LVTTIMER.
The IRQ line to use for timer interrupts is programmed into LVTTIMER
when the MVIC is initialized.
Change-Id: Icba0429f65ece7541fa8542814a8fdc39ad43936
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This was only needed for an older implementation of software interrupts,
now superseded by the irq_offload() API (which doesn't interact with
the interrupt controller at all)
Change-Id: I8aa696d370ae1799872f6d70de69f3cb5b47456a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The kernel event logger requires this function to obtain
the irq that is being processed, but this was not implemented
for mvic. This patch add this function to mvic.
Change-Id: I5e1b4a6e2758b69ec713c18ac9f78aebad18a93f
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
This module is based on the standard Local APIC and IO APIC source modules.
This modules combines these modules into one source module that exports the
same APIs defined by the Local APIC and IO APIC header modules. These
routine have been adapted for the Quark D2000 Interrupt Controller which has
a cutdown implementation of the Local APIC & IO APIC register sets.
Change-Id: Ic80aa78918483663d76054ebadefa08d8a3f188a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Kumar Gala