ARC only supports only 2 priority levels so make sure
the IRQ priority is not greather than 1.
The test was passing in previous build because the ASSERT was
not enabled.
Fixes Issue #8099
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000_ss.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
As flash address changes between different boards of same Soc,
it is derived from .dts file instead of hard coding in .dtsi.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Punit Vara