rename NANOKERNEL_TICKLESS_IDLE_SUPPORTED to
TICKLESS_IDLE_SUPPORTED and remove nanokernel occurances in Kconfig
files.
Make TICKLESS_IDLE depend on hardware that supports it.
Change-Id: I6a2e4fb0f7cf4b45475b48e71823ea089ee98759
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
PRINTK was conflicting, reanme to DBG.
Jira: ZEP-953
Change-Id: If5d6ef385c5ed223f6f7eae9bde887ae4a1b946a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
That module is not used anymore: it was introduced pre-Zephyr to add
some kind of awareness when debugging ARM Cortex-M3 code with GDB but
was never really used by anyone. It has bitrotted, and with the recent
move of the tTCS and tNANO data structures to common _kernel and
k_thread, it does not even compile anymore.
Jira: ZEP-1284, ZEP-951
Change-Id: Ic9afed00f4229324fe5d2aa97dc6f1c935953244
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The nRF RTC driver, which is used a system clock driver due to the lack
of SysTick hardware on the SoC, was using too much CPU time in its
_timer_idle_exit() implementation due to the use of 64-bit arithmetical
operations. This was causing the ISR wrapper to add excessive latency to
critical interrupts, causing BLE controller asserts.
This patch addresses the issue by using exclusively RTC ticks instead of
OS ticks, thus avoiding the necessity to convert during
_timer_idle_exit() calls, which are the most critical to interrupt
latency.
In addition the driver is now able to detect setting tick events in the
past due to it being interrupted by a higher priority context, and will
reschedule and trigger the ISR at the same time.
Change-id: I56a3be96b9fdd554c3650012d647af2f0415eb8a
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
When going into DEEP_SLEEP state, the ARC timer
needs to be restored.
This implements the function to restore the timer
after sleep.
As the time spent during sleep is not currently known,
the timer is expired to reschedule the application task.
Jira: ZEP-1224
Change-Id: I22a30d0fd79f177cf166b9a29dc78d68f7d7fbad
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
ccflags-y += -I$(srctree)/kernel/unified/include isn't need so lets
remove it.
Change-Id: I910bbac4a189de965d844f5fc36571e8dcb5705d
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
The nRF5x series SoCs do not implement systick, hence we disable
CORTEX_M_SYSTICK.
Instead, use nRF SoC Series NRF_RTC1 for system clock interfaces.
The kernel system clock interface is implemented using the low
power real time counter NRF_RTC1. NRF_RTC0 is used by the BLE
controller.
In addition, cleanup nRF5x series defconfig to be consistent.
Jira: ZEP-742
Jira: ZEP-1308
Jira: ZEP-1315
Change-id: I0f6cc1836fe0820a65f2cbb02cf5ae7e9eb92e1d
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Make the systick feature optional that can be selected by the SoC.
Change-Id: I4a405640b84daecc17fc1882743d3cafb78ff861
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.
Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.
The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.
The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.
Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.
Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
MVIC does not have _REG_TIMER_CFG defined because it does
not have a timer config register. Add checks for MVIC at
places where it is used.
Jira: ZEP-1015
Change-Id: I59f5c43cc2d1b17cf9e88b940631c2542e9729ab
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Interrupt stubs now just push the ISR and parameter onto the stack
and jump to the common interrupt code, never to return.
Change-Id: I82543d8148b5c7dfe116c43f41791f852614bb28
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
Removed CONFIG_INT_LATENCY_BENCHMARK dead code.
CONFIG_INT_LATENCY_BENCHMARK depends on ARCH="x86", it will never
be true for ARM code.
Change-Id: Ia5779a69b1bf670ebb140c2923c9fe0af6b781d4
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
Removed unused workaround in loapic. There are no references
of usage.
Change-Id: I8700b4b7ce8efef5e7b95e6cdd2b201eae3f1f37
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
They must provide the k_cycles_get_32() API and must not refer to
command packets: the latter do not exist on unified kernels.
Change-Id: Ia354dc060e5ad2595850f97da82d8feb590d16b7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
DEFINE_DEVICE_PM macro was not defining device_pm_ops
as 'static'. Fixes the issue and impacted areas.
Jira: ZEP-639
Change-Id: I5e1de6af97bf7b2b690af0c81034ce167e655e43
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Defined in all SoCs, but never referenced anywhere. That definition has
been replaced by CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
Change-Id: I1801f72a03925717ded6fbfdef22b1993f843461
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
A previous re-work of IRQ priorities was led astray by an incorrect
comment. Priority level 1 is not a non-maskable interrupt priority.
In addition, zero latency IRQs are not implemented on ARC.
Timer driver now doesn't specify IRQ_ZERO_LATENCY (as that wouldn't be
correct) and its IRQ priority is now tunable in Kconfig. The default is 0.
IPM driver on both ARC and x86 side were being configured with hard-coded
priority of 2, which wasn't valid for ARC and caused an assertion failure.
The priority level is now tunable with Kconfig and defaults to 1 for ARC.
Issue: ZEP-693
Change-Id: If76dbfee214be7630d787be0bce4549a1ecbcb5b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We have already done this on x86 and ARM. The policy is as follows:
* IRQ priority levels starting at 0 all have the same semantics and
do not have special properties. The priority level is either ignored
on arches which do not support programmable priority levels, or lower
priority levels take precedence over higher ones.
* Special-case priorty levels are specified via flags, in which case
the supplied priority level is ignored.
Issue: ZEP-60
Change-Id: Ic603f49299ee1426fb9350ca29d0b8ef96a1d53a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is part of a change to enable device suspend/resume and
Deep Sleep support in applications. Adds suspend/resume handling
in loapic timer.
Jira: ZEP-512
Change-Id: I9da2c8419bd9109fb71ef5a6caf736de7c7de9e1
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Tickless idle is not yet supported. We program the timer period
to the desired system clock tick rate (sys_clock_hw_cycles_per_tick).
This was renamed to the same name used in the Altera Embedded IP
Peripherals Guide; used by other CPUs than Nios II.
Change-Id: Ic4fca8c16b923295b77b63f98f45cd3483c5f560
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Building microkernel for ARC causes a compiler error
due to missing declaration of _sys_idle_elapsed_ticks.
Declare this as extern.
Jira: ZEP-397
Change-Id: I83701f693fea0fcb1ae2c30e0c52abe7987de1f1
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
The timer implementation for ARC currently requires timer0 to be present.
I've added a comment that this is an assumption and to encourage developers
to build the ARC CPU with Timer0, when it is to be used with Zephyr.
There is also an optional provision for a Timer1. In future, this
code could be conditional to use either timer.
Change-Id: I4eb3aec59ba4e85f8b70d5531b21bdaab00b93bb
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.
This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.
Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for task_sleep() and fiber_sleep() during the
system initialization. When CONFIG_NANO_TIMEOUTS defined,
before the k_server() starts, kernel uses nanokernel
system clock announce and task sleep functionality.
To give device drivers early sleep functionality, the system
clock has to start on SECONDARY initialization level, same
as most of the drivers.
Change-Id: Ie1d391945cd1cfb9a5dc199783c2d224eb1b0ef3
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
ASSERT are put each time the timer0 limit register or the timer0 count register
is modified.
Change-Id: I38684d57803de285f4e26c68b449c71396e4c750
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
When exiting from tickless idle uppon an external IRQ, the TICK timer
is set to fire at next TICK boundary. The current algorithm can lead
to a point that timer0_count register is higher than the timer0_limit
register.
In this situation the next TICK will fire after the counter has
wrapped and performed another cycle (~133 seconds).
This condition appears when the counter reaches the limit after the
Interrupt Pending flag is checked. At this point the counter is
automatically wrapped to 0, but is set just next to the limit to fire
at next TICK boundary by SW. At exit of the _timer_idle_exit function,
the timer handler is called, and sets the limit to 1 TICK. At this
point the situation is:
- limit register == 1 TICK
- count register is just below the old limit register and higher than
1 TICK
To fix this issue, at _timer_idle_exit, the limit register is always
set to 1 TICK and the count register set such as the next TICK fires
on time.
Change-Id: Ifa002809d426aa04109592e53d2b02a224f51101
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
The timer counts from 0 to programmed_limit included.
Change-Id: Ifc8585210c319f5452fafc911d4f6d72c4b91eaa
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
This reverts commit 0d50329105.
This breaks sanitychecks in CI. The early_sleep kernel test case is failing
randomly.
Change-Id: I015f20699c052b4089076699fc0180945c4d3d16
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for task_sleep() and fiber_sleep() during the
system initialization. When CONFIG_NANO_TIMEOUTS defined,
before the k_server() starts, kernel uses nanokernel
system clock announce and task sleep functionality.
To give device drivers early sleep functionality, the system
clock has to start on SECONDARY initialization level, same
as most of the drivers.
Change-Id: I5b3cf3da4c8d8398a966e901ab211f2fcee18dd6
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This reverts commit 3c66686a43.
That commit fixed announcing ticks before the microkernel was up, but
prevented devices initializing before the MICROKERNEL level from having
access to the hi-res part of the system clock, which they could not poll
anymore.
Change-Id: Ia1c55d482e63d295160942f97ebc8e8afd1e8315
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Modifications to timer drivers and interrupt setup, to manage
the tickless idle for the x86 architecture
Change-Id: Ie02d484b7e5636de6ea382ba2eeed57e704c8498
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The ticker was always initialized in the NANOKERNEL init level. In a
microkernel, this can cause problems if for the some reason the
initialization of the microkernel server is delayed, such as devices
initialization in the NANOKERNEL level taking non-insignificant time to
complete. What happens in that case is the ticker ISR will start firing
and piling up events in the microkernel server stack, and quite quickly
overrun it, since it has a finite size, causing random crashes.
So, in the microkernel, initialize the ticker once the microkernel
server is available. There is no point in sending ticker event before
anyway.
Change-Id: Ie9e13184f6ad35954023faf3bbff26242284b7be
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.
Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Mostly SoC initialization and some kernel subsystems, but also some
device drivers like the interrupt controllers.
Change-Id: I8dc1844c33acd877c075b6b03558fdca6f87500b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Benjamin Walsh