Commit Graph

10 Commits

Author SHA1 Message Date
Julien Delayen 176d184fb8 power: Add ARC core suspend and resume support
When going into DEEP_SLEEP mode, the ARC core now saves
its context. This includes:
- All core registers
- Stack pointer
- Program counter (restored by jumping to the restore code)

The arc reset code now checks if the GPS0 bit 2 is set.
This is similar to the behavior of the x86 core done by
the QMSI bootloader which is setting GPS0 bit 1 in order
to call the restore path instead of cold boot path.

The sample has been adapted in order to support the ARC.

Jira: ZEP-1222

Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-12-15 12:49:33 +00:00
Ramesh Thomas eec187e11e tests: power_mgmt: Fix wrong value being passed to post_ops func
The app passes the index into an array storing power states
instead of the power state to _sys_soc_power_state_post_ops

Jira: ZEP-1341
Change-Id: I6ddf0a2dbadfd06aafbcafa88be7441e99694a51
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-23 00:21:52 +00:00
Javier B Perez 0ad8f517f7 test: power states: fix dead code issue
Coverity detected some constant value in the vars, due to the
exclusive config select in the code.

Change-Id: Id27b658f3cd70dce626fef054457a9c726b3b957
CID: 151974, 151972 and 151971
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
2016-11-18 02:05:00 +00:00
Ramesh Thomas 4944c3e705 tests: power_states: Update testcase.ini to include arc
testcase.ini was not building for ARC. This app would
run on x86 and arc.

Change-Id: I961d56079aa1db7d84e0fcc87780ba11d7f4d831
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-16 02:18:45 +00:00
Jon Moeller 8358468fed ext qmsi: Add config support and kernel events for enabling SoCWatch
tests: power_states app updated to support SoCWatch collection

Add CONFIG_SOC_WATCH option for enabling the SoCWatch
 QMSI driver and associated instrumentation hooks.

Bug fix for soc_watch.c to use local irq_lock/unlock
 This will be put into QMSI as well.

JIRA: ZEP-1121

Change-Id: I0514324e81ca02c1d01ffc2d6cf4d31aee491544
Signed-off-by: Jon Moeller <jon.moeller@intel.com>
2016-11-12 01:36:49 +00:00
Ramesh Thomas 8367056efa power_mgmt: Rename _sys_soc_resume notification disabling API
The API to disable _sys_soc_resume notification is currently
called _sys_soc_disable_wake_event_notification. This is
misleading because it is possible that the ISR from which
_sys_soc_resume is called could be from a different interrupt
with higher priority that happened before interrupts were
enabled. More accurately, it is a notification of exit from
kernel idling after pm operations.

Jira: ZEP-1271
Change-Id: I83747f2cacac1bc17f135d12f4aa4478970fc02d
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-11 20:40:54 +00:00
Julien Delayen f540cbc5c5 power: Add ARC power states and update sample
Add Low Power States support to the power shim layer
and show the usage in the quark_se sample.

States are defined as follow:
- SYS_POWER_STATE_CPU_LPS: SS2 with LPSS enabled
- SYS_POWER_STATE_CPU_LPS_1: SS2 with LPSS disabled
- SYS_POWER_STATE_CPU_LPS_2: SS1 with LPSS disabled

Jira: ZEP-994

Change-Id: Ie4b93f6e539cb53fc035be00280b66b2cb0d9fea
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-11-11 03:28:54 +00:00
Anas Nashif d622b09bc0 samples: tests: remove obsolete KERNEL_TYPE and kernel variables
Remove those from Makefiles and testcase.ini, we now support unified kernel
only and sanitycheck script now knows how to deal with this.

Change-Id: I853ebcadfa7b56a4de5737d95f2ba096babb2e13
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-04 15:47:25 -04:00
Ramesh Thomas ded076d175 tests: power_mgmt: Make power test unified kernel based
Port the power management test app to use unified kernel.

Change-Id: I2f10748be5ca7d9792f6e97c35f5f2aabab769e7
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-03 14:47:56 -07:00
Julien Delayen fec01af64a power: Update Quark SE PM layer with QMSI 1.3
QMSI 1.3 natively supports restoring the SoC and peripherals
after sleep.

The Zephyr Power Management shim layer is updated
in order to support QMSI functions.

The following functions have been added:
void _sys_soc_set_power_state(enum power_state);
void _sys_soc_power_state_post_ops(void);

In order to fully support deep sleep, the function
_sys_soc_set_power_state now support saving and
restoring CPU context and returns to the application.

_sys_soc_set_power_state function also abstracts
QMSI cpu states and enable the application to choose
between C1/C2 or C2LP states.

The QMSI power states are mapped as follows:
SYS_SOC_POWER_STATE_CPU_LPS -> power_cpu_c2lp
SYS_SOC_POWER_STATE_CPU_LPS_1 -> power_cpu_c2
SYS_SOC_POWER_STATE_CPU_LPS_2 -> power_cpu_c1
SYS_SOC_POWER_STATE_DEEP_SLEEP -> power_soc_deep_sleep
SYS_SOC_POWER_STATE_DEEP_SLEEP_1 -> power_soc_sleep

The following functions have been removed:
void _sys_soc_set_power_policy(uint32_t pm_policy);
int _sys_soc_get_power_policy(void);
FUNC_NORETURN void _sys_soc_put_deep_sleep(void);
void _sys_soc_put_low_power_state(void);
void _sys_soc_deep_sleep_post_ops(void);

Those changes are propagated to the samples.
All calls to QMSI are removed.

Jira: ZEP-1045, ZEP-993, ZEP-1047

Change-Id: I26822727985b63be0a310cc3590a3e71b8e72c8c
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-03 21:31:30 +00:00