Directly use AON GPIO trigger instead of IPM.
In the past, SW did not allow arc to receive AON GPIO interrupt.
So, interrupt from BMI160 was routed to x86 cpu. Then, x86 cpu
passed the event to arc through IPM. But, SW was updated and arc
is able to directly receive interrupt from AON GPIO now. So, IPM
is not needed any more. Let's remove IPM related code and use
GPIO as the default trigger source.
This change is on top of the bmi160 sample app change to not use
IPM.
Change-Id: I49d8040764d03b24e09d89e66643c020ef63a3c9
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The nRF RTC driver, which is used a system clock driver due to the lack
of SysTick hardware on the SoC, was using too much CPU time in its
_timer_idle_exit() implementation due to the use of 64-bit arithmetical
operations. This was causing the ISR wrapper to add excessive latency to
critical interrupts, causing BLE controller asserts.
This patch addresses the issue by using exclusively RTC ticks instead of
OS ticks, thus avoiding the necessity to convert during
_timer_idle_exit() calls, which are the most critical to interrupt
latency.
In addition the driver is now able to detect setting tick events in the
past due to it being interrupted by a higher priority context, and will
reschedule and trigger the ISR at the same time.
Change-id: I56a3be96b9fdd554c3650012d647af2f0415eb8a
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
There are static initializer macros available for most kernel objects
which we should use whenever possible.
Change-Id: I496f4d05d26801eddd21fae53bdd4fcdc3246fe3
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
When going into DEEP_SLEEP state, the ARC timer
needs to be restored.
This implements the function to restore the timer
after sleep.
As the time spent during sleep is not currently known,
the timer is expired to reschedule the application task.
Jira: ZEP-1224
Change-Id: I22a30d0fd79f177cf166b9a29dc78d68f7d7fbad
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
In order to resume the ARC from deep sleep,
the interrupts need to be restored.
The FIRQ stack needs to be saved and restored
when performing sleep operations.
During early initialization, the sp in the 2nd register bank
is made to refer to _firq_stack.
This allows for the FIRQ handler to use its own stack.
Fast Interrupts cannot be used after sleep if this information
is not restored.
This patch adds the suspend and resume functions.
Jira: ZEP-1223
Change-Id: Ic81980f05aee6c1f7b8c46c743f2648c65b29486
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Move interrupt initialization for the ARC to its own
device. The init function for the arc will be only
doing platform specific operations
Jira: ZEP-1288
Change-Id: Icb04c3622890021c65cd24cecf6cafee6c37caf9
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
In order to keep the initialization process light-weight, remove
net_buf_pool_init() and instead perform the initialization of the pool
and buffers in a "lazy" manner. This means storing more information
in the pool, and removing any 'const' members from net_buf. Since
there are no more const members in net_buf the buffer array can be
declared with __noinit, which further reduces initialization overhead.
Change-Id: Ia126af101c2727c130651b697dcba99d159a1c76
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Restructure the RANDOM Kconfig to match the structure used in other
drivers with a single top level menu. Move the true random number
generators to appear first in the menu, with pseudo generators at the
bottom. Do not present pseudo generators if a true random generator
is presented.
This change implies that tests, samples and applications that require
the random driver interface must now select CONFIG_RANDOM_GENERATOR.
In order for tests and samples to build (and run) on platforms that
have no random driver it remains necessary to select
the CONFIG_TEST_RANDOM_GENERATOR.
Note that CONFIG_TEST_RANDOM_GENERATOR retains its original purpose of
enabling a random driver that delivers non random numbers for the
purpose of testing only.
Change-Id: I2e28e44b4adf800e64a885aefe36a52da8aa455a
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Update drivers to return INT_PLUS_MICRO values instead of doubles.
This hides the fact that the drivers use floating point operations and
doesn't force the application to use them as well.
Change-Id: I14c6faecb35331c2fdbdab41bc624d751de984b8
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
Use integers for sensor value calculations in which doubles are not
required.
Change-Id: I8662023ca596cb232e31849b0b77ae2bf0372cf0
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
Remove SENSOR_VALUE_TYPE_INT as it is the same as
SENSOR_VALUE_TYPE_INT_PLUS_MICRO with val2 set to 0.
Change-Id: If5a9c579b7267701c27f40fd887acae47d64edc5
Signed-off-by: Bogdan Davidoaia <bogdan.m.davidoaia@intel.com>
Until now it has been necessary to separately define a k_fifo and
an array of buffers when creating net_buf pools. This has been a bit
of an inconvenience as well as blurred the line of what exactly
constitutes the "pool".
This patch removes the NET_BUF_POOL() macro and replaces it with a
NET_BUF_POOL_DEFINE() macro that internally expands into the buffer
array and new net_buf_pool struct with a given name:
NET_BUF_POOL_DEFINE(pool_name, ...);
Having a dedicated context struct for the pool has the added benefit
that we can start moving there net_buf members that have the same
value for all buffers from the same pool. The first such member that
gets moved is the destroy callback, thus shrinking net_buf by four
bytes. Another potential candidate is the user_data_size, however
right not that's left out since it would just leave 2 bytes of padding
in net_buf (i.e. not influence its size). Another common value is
buf->size, however that one is also used by net_buf_simple and can
therefore not be moved.
This patch also splits getting buffers from a FIFO and allocating a
new buffer from a pool into two separate APIs: net_buf_get and
net_buf_alloc, thus simplifying the APIs and their usage. There is no
separate 'reserve_head' parameter anymore when allocating, rather the
user is expected to call net_buf_reserve() afterwards if something
else than 0 headroom is desired.
Change-Id: Id91b1e5c2be2deb1274dde47f5edebfe29af383a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This issue was reported by Coverity
Coverity-CID: 157621
Change-Id: I7f84c0868467ab55e033aecac037967da001a6db
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Device sync APIs are actually wrappers for semaphores.
Let's replace them with semaphores.
Jira: ZEP-1411
Change-Id: Ic37972a631f0bfd7bc45f28088e1c423151b1612
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Device sync APIs are actually wrappers for semaphores.
Let's replace them with semaphores.
Jira: ZEP-1411
Change-Id: I02c7cba21d21ff9288e452121e3b7ebb7d251bb4
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Device sync APIs are actually wrappers for semaphores.
Let's replace them with semaphores.
Jira: ZEP-1411
Change-Id: I5662057222aec54f02db9d9cdcd7f4f006c6c530
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Use the SYS_INIT() mechanism to invoke the sys_rand32_init() function
in random drivers that require an initializer. Remove all empty
sys_rand32_init() instances.
The existing explicit sys_rand32_init() function runs immediately after
PRE_KERNEL_2 before stack canaries are initialized. In order to get
equivalent behaviour with sys_rand32_init() we set SYS_INIT() to
initialize the random drivers at the lowest priority of PRE_KERNEL_2.
Change-Id: I4521e44daac806bc4eef01ce7fdf2ba5367e0587
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Basic interrupt driven driver for the nRF5 onboard temperature sensor.
Change-Id: Id0ac303293b8e8b8285b19bcda31284ee6617105
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Now that we have a more generic ksdk pinmux driver that can be used
across multiple Kinetis SoCs, deprecate the specific k64 pinmux driver.
Jira: ZEP-1393
Change-Id: I11cfe9a53746a6e85eced2a7cecf0396d42a7a19
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Kinetis SoCs contain one or more PORT modules to handle pin muxing and
pin configuration. Unlike the existing k64 pinmux driver, this driver
handles each PORT module individually and can be used for other Kinetis
SoCs.
This driver uses KSDK CMSIS register accesses to the PORT module rather
than the KSDK PORT driver (fsl_port.h), because the Zephyr pinmux
interface contains both set() and get() functions to access the pin
configuration. The KSDK PORT driver only contains a set() function
(which is a very thin static inline function to modify the PCR
register), therefore building a shim on top of it would result in a
strange mix of using the KSDK PORT driver for the set() and a direct
CMSIS register access for the get().
Jira: ZEP-1393
Change-Id: I2f7c6b08b207350697d590dcd665223f81de9f9e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
subdir-ccflags-y +=-I${srctree}/subsys/net/ip isn't need so lets
remove it.
Change-Id: I60d97ce25398d7d3801e837075dbf75d1375e055
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ccflags-y += -I$(srctree)/kernel/unified/include isn't need so lets
remove it.
Change-Id: I910bbac4a189de965d844f5fc36571e8dcb5705d
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can locally reference the file we need, so don't add a -I we don't
need.
Change-Id: I4d9507d5368073443dcc78a5821fe09d3e0b9bfc
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can locally reference the files we need, so don't add a -I we
don't need.
Change-Id: I764aea4177a8995489e0f15f71f7373427b43394
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There's now snprintk available that's more light-weight on the stack
than snprintf.
Change-Id: I6b3e4409703ca92fe6b8f4146ff47c490ab826cb
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The SYS_LOG macros now map to printk by default, and printk doesn't
(currently) support %2.2x, rather %02x needs to be used instead (it
gives the same result).
Change-Id: I0f7a5b7da91afba0c970bce7e2680de40c917bd3
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Fix compilation issues that show up if SYS_LOG is mapped to printk
instead of printf. Unlike printf, printk is annotated so that the
compiler catches incorrect format specifiers passed to it.
Change-Id: I4d6f635a0ed61de698727028ea8767dc0ef28bb1
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Provide PWM driver for STM32 series F1/F4/L4.
Driver is ported on STM32Cube HAL and should support other STM32
series with minor updates.
Configuration is done so that PWM sample driver could be run on
all nucleo boards supporting PWM driver.
Change-Id: I6522a565451085df932e0eefd8404268380b5bfe
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pin config for PWM support on ST Nucleo boards
Following config is chosen:
-PA0/PWM2_CH1 for F401RE and L476RG
-PA8/PWM1_CH2 for F103RB
Change-Id: I013e15ed35360d7777bb24ff94e0830f913a6580
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch adds Timer 0 and 1 to be used as counters.
Jira: ZEP-1300
Change-Id: I9d8b971d8a3d76eee2f9cc4600e95729d67717a3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add driver for CMSDK (Cortex-M System Design Kit) APB WDOG. This device
uses NMI as interrupt hence it requires Runtime NMI (CONFIG_RUNTIME_NMI)
to be configured in the platform.
Tested with drivers/watchdog sample application.
Jira: ZEP-1300
Change-Id: Ib318047109af81e32060e80d456ef3873fd380ea
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the clock control interface into the ARM LTD
CMSDK APB UART driver.
Jira: ZEP-1300
Change-Id: Ic0a214beb02d56ffb02ad4e6ca26b80805c0a4e6
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the clock control interface into the ARM LTD
Beetle GPIO driver.
Jira: ZEP-1300
Change-Id: I576767b68a8e4aa965d34716528df3bb4e837d73
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds the clock_control implementation for the ARM LTD
Beetle platform.
The main features enabled are:
* Clock on and off in ACTIVE, SLEEP and DEEPSLEEP mode.
* PLL support (freq: 12, 36, 48 Mhz).
The integration with the existing drivers will be done in future
patches.
Jira: ZEP-1300
Change-Id: I07cb2325275bd86a036e8e24aeb7bbf2c6176a93
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the I2C for the STM32Lx series
Change-Id: Id1694aeb3606b4fa9772bfb7a9f60e48a7cc93a8
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add all possible pin assignment definitions for I2C{1-3} on STM32L4xx.
Change-Id: I2d4266bc3bb9ba41b74a80567c0b04a89963753e
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add macro for all the available pinmux for the USARTs present on
STM32L4.
Change-Id: Ie4352750e1c6f08642b3e222b57f2a791f08ef74
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EXTI support for the STM32l4XX family.
Change-Id: Ia92f26eaf49899ea23fae05dd3a7357007c9db20
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the support for all the GPIO port of the L4.
Change-Id: Id365e17223cd5c49443df9fb6b96a3c4f204f523
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the clock driver for the STM32L4 series.
Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deal with STM32L4X additions for clock and interrupt handling to the
uart driver.
Change-Id: I6e8dafb132dafea54b8f31a3a5cb6e35a207574d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Baohong Liu