Commit Graph

569 Commits

Author SHA1 Message Date
Mieszko Mierunski dc1c2742b6 boards: nrf: Moved SDA and SCL pin configuration to DTS for nRF boards
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Stanislav Poboril 631eedd334 arch: Add imx6sx m4 soc support
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-06-19 17:08:51 -05:00
Aurelien Jarno 7688f49065 drivers: usb_dc_stm32: change all endpoints to bidirectional
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.

This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:

    #define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                       CONFIG_USB_NUM_IN_ENDPOINTS)

    #define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                        CONFIG_USB_NUM_OUT_ENDPOINTS)

    #define NUM_BIDIR_EP NUM_OUT_EP

This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.

In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-18 15:24:15 -04:00
Alexander Wachter c601f3be67 can: Add can support for STM32L432
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alexander Wachter ebc31f6235 drivers: can: Prepare STM32 driver for other series than STM32F0
This commit splits the common interrupt into rx and tx parts because
only STM32F0 series has a common interrupt.
Moved clock source definition to device-tree.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alex Tereschenko 0824ec6409 dt: nrf52840: remove 0x from USBD address
The prepended 0x causes DTC warnings and shouldn't be there.

Tested by compiling hello_world for nrf52840_pca10056 before and after.

Fixes #8334.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
2018-06-16 18:00:56 +02:00
Marc Reilly 6c60abb03b drivers: gpio: add dts support for nrf52 gpio
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.

Existing boards that use nrf52 are updated.

Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
2018-06-14 15:56:39 +02:00
Savinay Dharmappa b7c4c0302c dts: riscv32: riscv32-qemu: Add device tree support
add device tree support for riscv32-qemu

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-06-13 08:47:52 -04:00
Johann Fischer 2055b84f79 boards: frdm_kl25z: add USB support
Add USB support to FRDM_KL25Z board.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-06-12 04:09:50 -04:00
Florian Vaussard c7d2dc2363 dts: stm32l4: Add PWM nodes
Add available PWM nodes to the existing STM32L4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard 7a60a2c49b dts: stm32f4: Add PWM nodes
Add available PWM nodes to the existing STM32F4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard bfa1941e1d dts: stm32f3: Add PWM nodes
Add available PWM nodes to the existing STM32F3 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard da0caab3fd dts: stm32f1: Add PWM nodes
Add available PWM nodes to the existing STM32F1 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard 0e8d97f186 dts: stm32f0: Add PWM nodes
Add available PWM nodes to the existing STM32F0 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard 71e66f06b4 dts: stm32: Add Timer and PWM binding
Add new device tree bindings for STM32 Timer and PWM IPs.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Rajavardhan Gundi e5b0e9ac07 DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-06-11 17:27:58 -04:00
Alexander Wachter b97dd472fb drivers: can: Move bit timing and clock to device tree
This commit moves the bit timing (PROP, BS1, BS2 segments and SWJ)
from Kconfig to the device-tree and fixes issue #7933

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-01 12:59:42 -05:00
Ramakrishna Pallala 05063ede55 dts: arc: Fix IRQ priorities for quark_se_c1000_ss
ARC only supports only 2 priority levels so make sure
the IRQ priority is not greather than 1.

The test was passing in previous build because the ASSERT was
not enabled.

Fixes Issue #8099

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-06-01 07:40:30 -04:00
Johann Fischer 5fae373107 dts: nxp: fix typo in usbd bindings
Fix typo in usbd bindings.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-05-30 11:23:39 -05:00
Erwan Gouriou 922490d3bb dts/bindings: Remove superfluous property definition
"clocks" property is defined in st,stm32-u(s)art.yaml
files while aslo defined in uart.yaml.
Remove redundant information.

Fixes #7974

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-05-29 07:43:12 -07:00
Punit Vara 95fc141ae5 dts: x86: Fix wrong interrupt number for I2C
Wrong interrupt number was populated from dts. This
commit solves following issue:

issue: #7793

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-05-28 08:45:58 -04:00
Anthony Kreft 94a22daf36 arch: arm: STM32L053X8 support
Add support for the STM32L053X8 on the NUCLEO-L053R8 board.

Signed-off-by: Anthony Kreft <anthony.kreft@gmail.com>
2018-05-25 13:06:18 -05:00
Jun Li 8cc002e657 soc: stm32f1: add port uart4
Enable supporting UART4 on STM32F107 and STM32F103Xe SoCs.
Modified stm32f1/dts.fixup for replacing USART with UART.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2018-05-25 11:58:20 -05:00
Ilya Tagunov 8b7c3cffb1 arch: arm: soc: stm32l0: add LPUART1 pinmux options
Add obvious and easily testable PA2/PA3 configuration
(same pins as USART2).

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-05-25 11:54:42 -05:00
Ilya Tagunov 1e6d827a53 drivers: serial: stm32: add LPUART support for L0/L4 series
LPUART (Low-power UART) peripheral is just like ordinary U(S)ART
which lives in a separate clock/power domain.
Therefore already existing code could be reused as is
almost entirely.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-05-25 11:54:42 -05:00
Bobby Noelte 58967c7d3c scripts: extract_dts_includes.py: fix multiple include in bindings
Correctly process multiple include files given to the
!include command of the YAML loader.

The fix only targets the sequential definition of include files.

Fixes #7067

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
2018-05-25 10:59:12 -05:00
Aurelien Jarno 509e6964cc arch: stm32l432: add support for USB controller
The STM32L432 SoC has a standard non-OTG USB controller. Add an entry
for it in stm32l432.dtsi and add the corresponding DTS fixup entries.
The controller is kept disabled and should be enabled at the board
level.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-05-24 09:42:30 -05:00
Aurelien Jarno dc01b99068 arch: stm32l4: only enable USB OTG on SoCs supporting it
USB OTG is currently enable for the whole STM32L4 family, while only a
few of them actually support it:

- STM32L475, STM32L476 and STM32L496 have an OTG controller
- STM32L432, STM32L433 and STM32L452 have an USB controller
- STM32L431, STM32L451 and STM32L471 do not have any USB controller

Fix that by moving the DT entry from stm32l4.dtsi to stm32l475.dtsi
and by adding a #ifdef #endif around the corresponding DTS fixup
entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-05-24 09:42:30 -05:00
Maureen Helm 9faa26dbc5 dts/nxp: Fix dtc v1.4.6 warning: Node has a unit name, but no reg prop
Adds #address-cells, #size-cells, and reg properties to cpus on the
lpc54xxx soc.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-23 15:16:44 -05:00
Maureen Helm 2d6c48bf16 dts/nxp: Fix dtc v1.4.6 warning: Node has a reg but not unit name
Adds unit names to the i.mx rt internal memory nodes.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-23 15:16:44 -05:00
Maureen Helm 22fc6008ea dts/nxp: Fix dtc v1.4.6 warning: Missing property '#clock-cells' in node
Replaces #clocks-cells with #clock-cell property in kinetis and i.mx rt
socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-23 15:16:44 -05:00
Savinay Dharmappa 76676651f4 dts: intel_s1000: Enable generating IRQ priority.
patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
Tomasz Bursztyka 2223160144 dts/bindings: Make use of RTC base in QMSI bindings
QMSI bindings were created prior to this base, and unfortunately not
updated to latest changes on last rebase.

Fixes #7694

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-22 08:28:55 -05:00
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
Alexander Wachter e73637af24 boards: stm: Add CAN support for stm32f072b micro controller
This commit adds the can device to the stm32f072b device tree and pinmux

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-05-19 20:19:30 +02:00
Alexander Wachter 50f8296baa drivers: can: Add dts bindings for CAN
This commit adds generic device tree bindings for can devices.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-05-19 20:19:30 +02:00
Armando Visconti 36b0c321a7 dts: bindings: Add SPI yaml file for LSM6DSL sensor
The LSM6DSL accel/gyro sensor can be accessed through
SPI bus. So the required configuration can be passed through
dts file.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-05-18 13:10:33 -05:00
Tomasz Bursztyka 0ce2cc19b3 dts/x86: Update i2c nodes with interrupts for quark_se and quark_d2000
Let's generate interrupt information for i2c through dts.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 17a2c1e699 dts: Add yaml descriptor for the QMSI SS GPIO driver
Used in Intel Quark SE ARC core.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 29e519821d dts/arc: Add the GPIO nodes to quark_se_c1000_ss
There are 4 of them.

Adding also the relevant copyright.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 61ef30d10e drivers/uart: Use dts to set uart options for ns16550 driver
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 8bbb80e308 dts/x86: Fix UART nodes for ia32, atom and quark_x1000
Base addresses and some IRQ numbers were wrong.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 17c6456678 drivers/uart: Use dts to set uart priorities for QMSI driver
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 43878fd8b6 dts/bindings: Remove useless attribute in QMSI uart node descriptor
Clock gate is set on driver level through QMSI API.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 250c4a87ed arch: Use dts to set rtc priorities for Intel quark, x86 and arc
Get the name generated through dts as well.
Fix the rtc driver and relevant SoCs accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 16c455e4cd dts/arc: Add rtc node to quark_se_c1000_ss
RTC settings will be generated through dts, and this SoC owns an rtc
node.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 1f2553ba5c dts: Add yaml descriptor for the QMSI RTC driver
Used in Intel Quark SE/D2000 SoCs.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 53f91976b1 arch/x86: Use dts to set gpio options for quark_se and quark_d2000
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.

Irq priority is not set by dts for D2000 as it's irq controller does
not support it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 69e5b3ec3d dts/x86: Fix GPIO nodes for intel_curie and quark_d2000
Base addresses were wrong, and intel_curie missed a second gpio node.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 878d0fb877 dts: Add yaml descriptor for the QMSI GPIO driver
Used in Intel Quark SE/D2000 SoCs.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka e4aced513d dts/x86: Enable generating the IRQ priority on all SoCs
Now that IOAPIC descriptor supports it, let's use it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka b8e8077cbe dts: Adding priority cell to Intel's IOAPIC IRQ controllers descriptor
Zephyr exposes the ability to set IRQ priority on IOAPIC.
To keep compatibility with Linux, let's add the priority at the end
after sense. So imported dtsi with interrupt-cells set to 2 will work as
usual.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 9e1f1acc24 dts/x86: Add Copyright headers to x86 dtsi files
All were missing it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Savinay Dharmappa 2948924655 dts: nios2-qemu: add device tree support
Add device tree support for nios2-qemu

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-17 14:09:15 -07:00
Savinay Dharmappa 8f908f38e0 dts: nios2f: Add device tree support
Add device tree support for nios2f soc

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-17 14:09:15 -07:00
Stanislav Poboril 5477ee4531 mcux: Add MCUX IPM driver for lpc and kinetis socs
Add driver for MCUX mailbox which can be used for lpcxpresso54114
and other lpc and kinetis socs.

Origin: Original

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-05-17 15:07:48 -05:00
Kumar Gala b7312d1bbc arch: arm: lpc: Added support for Cortex-M0+ on lpc54114 soc
Add soc configuration support and dts files for nxp_lpc54xxx_m0.

Adjusted nxp_lpc54xxx soc, configuration and dts files for the
presence of slave core.

Origin: Original

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-17 15:07:48 -05:00
Maureen Helm 7960f79134 dts: Add kinetis watchdog bindings and update k64, kw2xd soc nodes
Adds dts bindings for the kinetis watchdog peripheral, and updates the
watchdog nodes for the k64 and kw2xd socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-17 15:00:55 -05:00
Andy Gross 1fe586f678 dts: nxp: kw41z: Fixup NXP Kinetis RTCs on KW41Z
This patch adds some DTS information to flesh out the NXP Kinetis
based RTC blocks.  DTS fixups were added as well to match up the driver
usage to the DTS output.

Signed-off-by: Andy Gross <agross@kernel.org>
2018-05-17 13:45:08 -05:00
Andy Gross d75291ef93 yaml: rtc: Add yaml definitions for RTC
This patch adds the YAML descriptions for a generic RTC block and
also for NXP Kinetis based RTCs.

Signed-off-by: Andy Gross <agross@kernel.org>
2018-05-17 13:45:08 -05:00
Florian Vaussard ae71554be3 dts: stm32l4: add node and fixup for i2c4
Add the device tree node for I2C4 and the corresponding fixup.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-05-17 13:08:36 -05:00
Johann Fischer d8cd119562 dts: arm: nxp: use DT to configure USBD on Kinetis SoC
Add DT and fixup files to configure USB device driver on
Kinetis SoC K64F and KW24D512.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-05-17 07:00:49 -05:00
Johann Fischer 9c27ae7162 dts: bindings: add yaml file for Kinetis USBD support
Add yaml file for Kinetis USBD support.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-05-17 07:00:49 -05:00
Yannis Damigos d8983e6d11 dts/st,stm32-usb: Add use-prop-name to disconnect-gpios
Add use-prop-name to disconnect-gpios property in st,stm32-usb
yaml, in order to generate friendly name for the definitions.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-16 10:27:04 -05:00
Stanislav Poboril fd4759b5d7 arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4
Rename various SoC related defines and files from just being LPC54114
to LPC54114_M4.  This is in prep for supporting a build for the second
core on the LPC54114 (the Cortex-M0+).

* Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4
* Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4
* Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi
* Moved some pinmux related defines into SoC code.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-15 15:49:15 -05:00
Stanislav Poboril 45cfea6f4a board: lpcxpresso54114: Move led and button definitions to dts
Moves the led and button definitions for the lpcxpresso54114 board from
board.h to dts.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-05-15 15:49:15 -05:00
Yannis Damigos 8cf04a18fd dts/bindings: Add reset/irq gpios to zephyr,bt-hci-spi yaml
Define reset-gpio and irq-gpio in zephyr,bt-hci-spi yaml, to
generate GPIO definitions for control pins of Bluetooth HCI
SPI module.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-15 15:11:12 -05:00
Wayne Ren 532e4d22ee dts: optimize and bug fixes the dts of em_starterkit
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
  in dts folder

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Wayne Ren 99e1f849bf dts: optimize the dts for em_starterkit
eliminate unnecessary duplication

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
David Leach 9e09e2a1b7 OpenThread: Change SETTINGS_CONFIG_PAGE_SIZE to target specific value
- Changed define for SETTINGS_CONFIG_PAGE_SIZE from a hard coded value
  to reference build system generated FLASH_ERASE_BLOCK_SIZE. This value
  comes from 'erase-block-size' found in the dtsi file of devices.
- Modified nrf52840.dtsi to include definition for 'erase-block-size'

Fixes #7107

Signed-off-by: David Leach <david.leach@nxp.com>
2018-05-14 17:23:38 -04:00
Maureen Helm 2368edd8e7 mimxrt1050_evk: Move led and button definitions to dts
Moves the led and button definitions for the mimxrt1050_evk board from
board.h to dts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-14 14:36:15 -05:00
Karol Lasończyk 83e4947cf1 dts: nrf: Expand nRF DTS to support watchdog
Commit introduces support for watchdog configuration for Nordic
Semiconductor nRF SoCs in device tree.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
2018-05-14 10:28:23 -05:00
Yannis Damigos c0b472132c dts/arm/st: Add USB support for stm32l072/73
Add USB support for stm32l072 and stm32l073 SoCs

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-14 09:33:29 -05:00
Yannis Damigos b3107fd120 dts/bindings/usb: Add disconnect gpio in st,stm32-usb.yaml
Add disconnect-gpio property in st,stm32-usb.yaml.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-11 16:53:12 -04:00
Maureen Helm 0d1beb2f9e boards: dts: Add mcr20a bindings and fix networking samples
Adds dts bindings for the mcr20a wireless transceiver. The frdm_k64f
board supports the mcr20a via an Arduino shield, therefore the dts node
is added to the board dts. The kw2xd is a SiP and thus the mcr20a dts
node is added to the soc dts.

The networking samples using prj_frdm_k64f_mcr20a.conf have been broken
since the refactoring of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-10 15:43:42 -05:00
Maureen Helm d2d4cea02d dts: nxp_kinetis: Add spi bindings for kinetis dspi and update soc nodes
Adds dts spi bindings for the kinetis dspi controller, and updates the
k64, kw2xd, kw40z, kw41z dts nodes accordingly.

Updates the dts interrupt priorities to match the board defconfigs
(e.g., boards/arm/frdm_k64f/Kconfig.defconfig)

For k64, fixes an error in the spi1 interrupt number and adds a third
instance (spi2).

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-10 15:43:42 -05:00
Maureen Helm 9cd36c7bd2 boards: dts: Add fxas21002 interrupt bindings and fix sensor sample
Adds dts bindings for the fxas21002 interrupt pins to all boards that
have this sensor.

The fxas21002 driver is currently only aware of one sensor interrupt
pin, therefore the routing of INT1 or INT2 to the driver is handled in
each board's dts.fixup.

The fxas21002 sample application has been broken since the refactoring
of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-10 15:43:42 -05:00
Maureen Helm 90ac25f736 boards: dts: Add fxos8700 interrupt bindings and fix sensor sample
Adds dts bindings for the fxos8700 interrupt pins to all boards that
have this sensor. The frdm_k64f and hexiwear_k64 connect both sensor
interrupt pins to the mcu, but the frdm_kw41z connects only one.

The fxos8700 driver is currently only aware of one sensor interrupt pin,
therefore the routing of INT1 or INT2 to the driver is handled in each
board's dts.fixup.

The fxos8700 sample application has been broken since the refactoring of
the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-10 15:43:42 -05:00
Kumar Gala 57904102fd gpio: dts: Introduce Kconfig symbols to convey GPIO dts support
Add a set of Kconfig symbols that allow us to set that the GPIO
driver/SoC support DTS (HAS_DTS_GPIO) and that drivers that need/use
GPIO support DTS as well (HAS_DTS_GPIO_DEVICE).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-10 15:43:42 -05:00
Erwan Gouriou 00376f08ca dts/bindings: Add reset and irq gpios to "st,spbtle-rf" yaml
In order to generate GPIO definition for control pin of BlueNRG module
define reset-gpio and irq-gpio in st,spbtle-rf yaml binding.

Add HAS_DTS_SPI_PINS kconfig symbol to control use of the '#define'

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-05-10 14:21:16 -05:00
Kumar Gala 11a70647cf dts: spi: Add optional cs-gpios to the spi bus controller binding
Now that we can generate gpio info from dts lets add optional support
fot the cs-gpios property in the bus controller node.  This matches the
binding spec from Linux on how cs-gpios are handled.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-10 14:21:16 -05:00
Erwan Gouriou 93d3a42776 scripts: extract_includes_dts: Remove usage of cell_string yaml attribute
'cell_string' yaml attribute has been introduced in order to
help enforcement of specific string during defines generation.
This adds complexity in understanding script behavior as a black
box and create additional dependency which is not strictly required.

For node specific generation functions (pinctrl and interrupts),
this could be replaced directly by an hardcoded version
(as everyone used the same 'cell_string' anyway).
For extract_cells functions, string could be replaced by extracted
property name. As a consequence, we're now able to generate defines
for properties refering to these controllers via phandle.
For instance, in following node
 	spbtle-rf@0 {
 		compatible = "st,spbtle-rf";
 		reg = <0>;
		reset-gpios = <&gpioa 8 0>;
 	};
We'll be able to generate:
 #define ST_STM32_SPI_...LE_RF_0_RESET_GPIOS_CONTROLLER	"GPIOA"
 #define ST_STM32_SPI_...PBTLE_RF_0_RESET_GPIOS_FLAGS_0		0
 #define ST_STM32_SPI_..._SPBTLE_RF_0_RESET_GPIOS_PIN_0		8

Only impact for this whole change is for NXP clocks which were the
only ones using 'cell_string' attribute with a value different than
the default one.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-05-10 10:38:23 -05:00
Yannis Damigos 3bbe87e171 dts/arm/st: Add usbotg_fs node to stm32l4 DT
Add otgfs (USB) node to stm32l4.dtsi.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-10 07:47:13 -05:00
Yannis Damigos 47fe4ee78b dts/arm/st: Add USB support for stm32f070/72
Add USB support for stm32f072 and stm32f070 SoCs

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-10 07:47:13 -05:00
Yannis Damigos 80d69ea47f boards: stm32f3_disco: Add USB support
Add USB support to STM32F3DISCOVERY board

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-10 07:47:13 -05:00
Yannis Damigos 38d2567e08 boards: olimexino_stm32: Add USB support
Add USB support to OLIMEXINO-STM32 board

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-05-10 07:47:13 -05:00
Maureen Helm 16399a6479 dts: mimxrt1050_evk: Add external memory nodes
Adds flexspi and semc memory controllers to the i.MX RT SoC. Adds
hyperflash, qspi, and sdram external memories to the mimxrt1050_evk
board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-08 17:39:28 -05:00
Gil Pitney 6be824d036 cc3220sf: Fix linker map and dtsi to ensure full 256K SRAM size
Previously, when !CONFI_XIP, BOOTLOADER_SRAM_SIZE was defaulted
to 16 (K), reducing the size of SRAM available for the program.

Also, though it has no effect, the value for SRAM start in the
dtsi file was incorrect.

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2018-05-08 17:35:25 -05:00
Diego Sueiro e8e76ae433 arch: Add imx7d_m4 gpio definitions
Adds all necessary gpio definitions and configurations for imx7d_m4 soc.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-05-08 06:56:56 -05:00
Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller
Add dts support for multilevel DW interrupt controller

Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 9ee4929d56 dts: i2c: Add dts support for i2c
Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 97f721d928 dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Manivannan Sadhasivam bb394bbafb drivers: led: Add LED driver support for TI LP3943
Add support for Texas Instruments LP3943 - 16 channel LED driver.
Supported blinking period: 0 to 1600ms
Supported brightness value: 0 to 100%

This driver supports the following APIs:

1. led_blink
2. led_set_brightness
3. led_on
4. led_off

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-04-27 10:46:53 -05:00
Yannis Damigos 398a5a4fc2 dts: dtc v1.4.6 warnings: Fix warning for leading 0s
Fixes the following warnings:
Node unit name should not have leading 0s

Fixes #7155

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-04-26 03:00:42 +05:30
Erwan Gouriou 986f249f03 dts/st: dtc v1.4.6 warnings: pin-c... node has a reg ... no unit name
To prepare to upcoming dtc v1.4.6, fix warnings in dts files.

This commit addresses the following warning:
Warning (unit_address_vs_reg): Node /soc/pin-controller has a reg
or ranges property, but no unit name

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-24 14:46:48 -05:00
Erwan Gouriou acc20e24d6 dts/st: dtc v1.4.6 warnings: Missing property '#clock-cells' in node
To prepare to upcoming dtc v1.4.6, fix warnings in dts files.

This commit addresses the following warning:
Warning (clocks_property): Missing property '#clock-cells' in node
/soc/rcc@40021000 or bad phandle (referred from
/soc/pin-controller/gpio@40011800:clocks[0])

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-24 14:46:48 -05:00
Maureen Helm 22955b83fd dts: Add gpio labels to all kinetis socs
Adds gpio labels to all kinetis socs in preparation for refactoring the
mcux gpio driver to dts. The kl25z was missing gpio nodes altogether, so
they are added.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-04-20 08:54:11 -05:00
Savinay Dharmappa a43ad6d5f0 dts: arc: quark_se_c1000_ss: Fix worng interrupt number in i2c 0/1
This fixes https://github.com/zephyrproject-rtos/zephyr/issues/7026

The issue is due worng interrupt number populated in dts for
i2c0 and i2c1 instance.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-04-20 08:03:00 -05:00
Erwan Gouriou 4fe3a9776f dts: gpio: create gpio dt-bingings and inlude in stm32 dtsi files
Create a dt-bindings/gpio.h file.
Bindings definitions are extracted from existing gpio.h.
gpio dt-bindings file is required because existing gpio.h file could
not be parsed by dts parser.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 13:36:45 -05:00
Erwan Gouriou 2b4cb5a7ad dts: provide yaml bindings for led and gpio keys
Provide yaml bindings for led and gpio keys (buttons).
These are based on gpio bindings.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 13:36:45 -05:00
Erwan Gouriou 6c92e55635 dts: bindings: add bindings for stm32 gpio
Provide yaml bindings for gpio nodes properties generation

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 13:36:45 -05:00
Erwan Gouriou 93318f9f00 yaml: rename cell_string clocks
Use capital letters, as this seems to be the norm for this field

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 09:01:25 -05:00
Erwan Gouriou 50bf306f4f dts: stm32: Populate gpio nodes for stm32l0 series
Introduce gpio nodes in stm32l0 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou a78adcdd91 dts: stm32: Populate gpio nodes for stm32l4 series
Introduce gpio nodes in stm32l4 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou a4c426abcb dts: stm32: Populate gpio nodes for stm32f3 series
Introduce gpio nodes in stm32f3 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou dbc3c02452 dts: stm32: Populate gpio nodes for stm32f1 series
Introduce gpio nodes in stm32f1 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou 8e5cf5fe8f dts: stm32: Populate gpio nodes for stm32f0 series
Introduce gpio nodes in stm32f0 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou e7ab1d306b dts: stm32: Populate gpio nodes for stm32f4 series
Introduce gpio nodes in stm32f4 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Erwan Gouriou 708b59b9aa dts: stm32: stm32f469 is a stm32f429 derivative
Make stm32f469.dtsi file inherit from stm32f429.dtsi

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-04-13 08:56:47 -05:00
Diego Sueiro 816330239e arch: Add imx7d m4 soc support
The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual
Cortex A7 core and Single Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A7 core (running Linux) via RPmsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A7 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A7 can perform these steps at bootloader level after the Linux
system has booted.

The M4 can use up to 5 different RAMs. These are the memory mapping for
A7 and M4:

+---------------+-----------------+---------------------------+
| Memory Name   | Start Address   | Size                      |
+===============+=================+===========================+
| TCML          | 0x007F8000      | 32KB                      |
+---------------+-----------------+---------------------------+
| TCMU          | 0x20000000      | 32KB                      |
+---------------+-----------------+---------------------------+
| OCRAM_S       | 0x20180000      | 32KB                      |
+---------------+-----------------+---------------------------+
| OCRAM         | 0x00900000      | 128KB                     |
+---------------+-----------------+---------------------------+
| DDR           | 0x10000000      | 256MB                     |
+---------------+-----------------+---------------------------+

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-04-11 08:27:05 +02:00
Diego Sueiro 346165b2e8 serial: Add imx uart driver shim
Adds a shim layer around the imx uart driver to adapt it to the Zephyr
serial interface.

Modem mode was introduce to control it as DCE and DTE and can be
configured in the device tree:
    modem-mode:
        type: int
        category: required
        description: Set the UART Port to modem mode 0 (dce) 1 (dte)
        generation: define

For now only the UART 2 was tested.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-04-11 08:27:05 +02:00
Kumar Gala 60ec8be309 arch: em{7,9,11}d: Add dts support
Add initial device tree support for the em{7,9,11}d SoC and associated
em_starterkit boards.  The device tree at this point specifies cpu core,
memory, interrupt controller, uart's and i2c controllers.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-23 10:13:53 +01:00
Tomasz Bursztyka 9b77741d63 drivers/i2c: Use standard bitrate settings for QMSI driver
Apply the change on relevant arch/boards.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka f55a295346 dts/x86: Add the i2c node in quark_d2000
This will generate the necessary configuration for the i2c controller
on quark_d2000.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka 5b229b296a dts/x86: Add the i2c node in intel curie
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka 8f891ba702 drivers/i2c: Use standard bitrate settings for DW driver
Applying the change to relevant arch/boards, either in their Kconfig or
the dts specific files.

Taking the opportunity in dw driver to rename the variable the same way
as they are everywhere else in the code (s/dev/dw and s/port/dev) in
init function.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka e8e14f841a dts/x86: Add the i2c node in quark_x1000
This will generate the necessary configuration for the i2c controller on
quark_x1000.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka 12a1823e21 dts/arc: Add the i2c node in Quark SE SS C1000
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000_ss.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka a913ba038a dts: Add yaml descriptor for the QMSI SS i2c driver
Used in Intel quark_se's ARC core.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka f98382a901 dts: Add yaml descriptor for the QMSI i2c driver
Used in some Intel quark SoC.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka 1ad56e3cee dts: Add yaml descriptor for the DW i2c driver
Shared irq is not managed there as it is a very SoC specific issue.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka 7789f9acb3 dts/i2c: Fixing copyright headers
Some yaml files were missing there copyright header.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Carles Cufi 8aa9a37902 drivers: flash: nrf: Rename nrf5 to nrf
With upcoming ICs that are not in the nRF5x family, rename the flash
driver and all its dependencies from nrf5 to nrf.

Should also fix the issue introduced by f49150cab6 which broke the
assignment of the flash device due to a partial rename.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-03-20 20:07:09 +01:00
qianfan Zhao 494bf56811 arch: arm: soc: stm32f0: add STM32F070XB SOC
Add initial support for STM32F070XB SOC

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-03-16 09:18:08 -05:00
Ilya Tagunov 00c0520247 arch: arm: soc: stm32l0: add I2C support
Add SPI support for STM32L0 series.
L0 SPI peripheral requires SCK pin speed workaround
to function properly.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-03-15 10:53:26 -05:00
Sundar Subramaniyan 037dddbe8f dts: arm: nrf52840_pca10056: Use DT to configure USB
Configure USB using DT for nrf52840_pca10056

Signed-off-by: Sundar Subramaniyan <sundar.subramaniyan@gmail.com>
2018-03-15 12:39:53 +01:00
Sundar Subramaniyan d963762184 dts: bindings: Add yaml file for nRF52840 USBD support to DT
Add yaml files to DT to support nRF52840 USBD

Origin: Original

Signed-off-by: Sundar Subramaniyan <sundar.subramaniyan@gmail.com>
2018-03-15 12:39:53 +01:00
Ilya Tagunov 9ae3fdc2ef arch: arm: soc: stm32l0: add I2C support
Add I2C support for STM32L0 series. LL-based driver
was already in place, so I've just enable it.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-03-14 09:02:25 -05:00
Aapo Vienamo dd9719bf46 gpio: Add a driver for SX1509B
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
2018-03-13 12:31:16 -05:00
Ilya Tagunov b6da79cb82 arch: arm: soc: stm32l0: add STM32L073xZ SOC
Add initial support for STM32L073xZ SOC which is not very different
from already supported STM32L072xZ.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-03-13 10:23:23 -05:00
Aapo Vienamo 516a179186 dts: arm: nrf5: Add i2c nodes
DT nodes for i2c0 and i2c1 are added for the nRF5 SoCs.

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
2018-03-13 14:14:13 +01:00
Aapo Vienamo 0b9ad29a40 dts: bindings: i2c: Add bindings for i2c_nrf5
A device tree bindings description is added for nRF5 I2C controller.

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
2018-03-13 14:14:13 +01:00
Kumar Gala 3b78d937e5 usb: ateml: samd21: enable usb controller in board dts not soc
Since not all boards enable all devices, we typically have the SoC dtsi
file have a device marked with status = "disabled" and have the
board.dts explicitly enable with status = "ok".  Update it so USB on
Atmel SAMD21 work this way.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-11 21:53:20 -05:00
Kumar Gala 40b7be5197 drivers: i2c: Add DTS support to ARM SBCon I2C controller
Added device tree support to the ARM SBCon I2C controller.  We utilize
the compatiable "arm,versatile-i2c" the binding from Linux for the some
peripheral block.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Justin Watson b9c65e1882 drivers: GPIO Added GPIO for SAM family.
Added GPIO driver for SAM family of SoCs.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-03-10 11:42:25 -06:00
Philémon Jaermann 8834a8d47b arm: stm32f446: Add support for stm32f446 SoC
Support for stm32f446xe SoC

Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
2018-03-10 11:42:25 -06:00
Endre Karlson bbb4b402b2 dts: arm: provider support for the stm32l0
Add necessary DTS files for stm32l0x and stm32l0x72

Signed-off-by: Endre Karlson <endre.karlson@gmail.com>
2018-03-10 11:42:25 -06:00
Yannis Damigos efbb7c61a1 arch/arm/soc/stm32f4: Add STM32F412CG MCU support
Add STM32F412CG MCU support.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-03-10 11:42:25 -06:00
Michael Hope a8a36a23fc spi: sam0: use Device Tree for configuration.
Switch the SoC device tree to define a single entry per SERCOM instead
of one per mode.

Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances

Switch the Arduino Zero, Adafruit Feather M0 Basic Proto, and
Trinket M0 to use the new defintion.

Add the APA102 LED that's on the Trinket as a test.

Signed-off-by: Michael Hope <mlhx@google.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Nathan Tsoi 28758fe986 arch: arm: STM32F051X8 support
Add support for the STM32F051X8 processor on the STM32F0DISCOVERY board

Signed-off-by: Nathan Tsoi <nathan@vertile.com>
2018-03-10 11:42:25 -06:00
Michael Hope f2651d0cc7 usb: sam0: add a USB device driver.
Implements a USB device driver for the SAM0 series.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-03-10 08:41:39 -05:00
Sahaj Sarup 069fce7289 boards: uart: Add UART6 for 96b_carbon
Enabled UART 6 on pin PC6 and PC7 for 96b_carbon

Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
2018-03-08 13:58:28 -06:00
Marti Bolivar e8e731e53b dts: common.dts: trivial whitespace cleanup
Trivial.

Signed-off-by: Marti Bolivar <marti@opensourcefoundries.com>
2018-02-22 18:52:42 +01:00
Justin Watson c1ce290d45 serial: sam: add support for interrupt driven serial
Implements interrupt driven UART for the serial driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-02-21 11:26:20 -06:00
Kumar Gala 0c45b84ce1 dts: nxp: Add add addr/size cell to spi nodes
The spi nodes should have #address-cells and #size-cells properties much
like i2c does.  Add these missing properties.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 11:14:59 -06:00
Yannis Damigos 22c1018bfb dts: arm: 96b_carbon use DT to configure USB
Configure USB using DT for 96b_carbon

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-02-21 09:17:12 -06:00
Yannis Damigos c431152147 dts: bindings: Add yaml files for STM32 USB support to DT
Add yaml files to DT for initial support of STM32 USB

Origin: original

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-02-21 09:17:12 -06:00
Tomasz Bursztyka 00b053a4c8 soc/stm32: Add DTS support for SPI port 2 on stm32f030 series
This feature is available on STM32F030x8 and STM32F030xC.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-02-20 12:26:12 -06:00
Daniel Wagenknecht ab20e83f78 dts: stm32: add SPI nodes and give example for /delete-node/
Most STM32F429 SoCs have 6 SPIs, but STM32F429Vx SoCs only have
4 SPIs. This is one of the rare conditions where device-tree
directive /delete-node/ should be used.

Add spi5 and spi6 node to stm32f429.dtsi. Create file
stm32f429vX.dtsi to delete those nodes and document usage of
/delete-node/ directive.

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-02-20 09:47:43 -05:00
Daniel Wagenknecht 2b26e710f1 dts: stm32: add SPI nodes to dtsi files
Add SPI nodes to existing dtsi files.

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-02-20 09:47:43 -05:00