Added basic PSoC6 UART driver and added two UART nodes in the PSoC6
device tree to have output from CM0+ and CM4 cores.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
UART pins (TX, RX, RTS, CTS) are now configured in DTS files.
RTS and CTS definitions are optional. If flow control is enabled
and RTS/CTS pins are not defined, then compiler will issue
an error message.
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
irq_lock returns an unsigned int, though, several places was using
signed int. This commit fix this behaviour.
In order to avoid this error happens again, a coccinelle script was
added and can be used to check violations.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Consistently use
config FOO
bool/int/hex/string "Prompt text"
instead of
config FOO
bool/int/hex/string
prompt "Prompt text"
(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).
The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.
Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The refactor to add callback user data param in 57286afd, contained
typo just for this driver. It sneaked past the PR CI due to the fact
that issue affected just a couple of platforms, and we select just
a few of them randomly for PR CI (vs full CI).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Zephyr UART drivers offer very low-level functionality. Oftentimes,
it would be useful to provide higher-level wrappers around UART
device which would offer additional functionality. However, UART
driver irq callback routine receives just a pointer to (low-level)
UART device, and it's not possible to get to a wrapper structure
(without introducing expensive external mapping structures). This
is an indirect reason why the current UARt wrappers - uart_pipe,
console - are instantiated statically just for one underlying UART
device and cannot be reused for multiple devices.
Solve this by allowing to pass an arbitrary user data to irq
callback, set by new uart_irq_callback_user_data_set() function.
Existing uart_irq_callback_set() keeps setting a callback which
will receive pointer to the device.
While public API maintains compatibility, drivers themselves need
to be updated to support arbitrary user data storage/passing (as
legacy uart_irq_callback_set() functionality is now implemented in
terms of it).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
- Remove redundant 'n' defaults. 'n' is the default value for bool
symbols.
This makes the auto-generated documentation clearer as well: You get
"implicitly defaults to n" instead of
"- n if <propagated dependencies>".
- Shorten
<type>
prompt "foo"
to
<type> "foo"
This works for all types, not just bool.
- Various formatting nits.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch changes the way the transmitter is handled in the UART
driver, so that it is activated only when there is something to send.
The current UART API does not allow to disable RX completely, since
the poll_in function description implies that UART must continuously
listen. To provide a way of disabling the entire UART and lowering the
current consumption, this patch adds the power management to the UART
driver. When instructed to enter any of the power saving states,
the driver will disable the UART, and it will enable the UART back
when it is switched again to the active state.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This extends the NS16550 driver to support 4 ports.
Also, this adds the necessary bits to enable PCI enumeration
on port 2.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The CONFIG_UART_NS16550_PORT_1_PCI was accidentally removed in
commit 26b474c987. So adds it back.
This allows PCI driver to probe the resources for port 1.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
After running some tests which enable assert macro I found some issues
with the i.MX UART configuration.
This patch configures the Tx Fifo Watermark and Modem Mode accordingly.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
1. dts.fixup files updated with peripheral address and IRQ NUMBER.
2. Peripheral address is taken from DT.
3. IRQ number is taken from DT.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Change define used to select interrupt driven functions
from CONFIG_UART_INTERRUPT_DRIVEN to CONFIG_UART_0_INTERRUPT_DRIVEN.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
1. Added support for two instances of UARTE.
2. Kconfig.nrfx is capable to configure UART and UARTE driver.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
In nsim, 'nsim_mem-dev=uart0,base=0xf0000000,irq=24'
is used to enable a virtual uart.
This uart is only used to output now, so only poll output
is implemented.
If required, input and interrupt driven are possible.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The dependency on the GPIO driver was a bit artificial, since the UART
driver used the GPIO API functions only to configure the pins at its
initialization. This configuration will be done by using nrfx GPIO HAL
functions directly, just like in case when a shim is using
an nrfx driver underneath.
HAL functions can be fed with the absolute pin numbers, that are
currently used for Nordic SoCs in Kconfig and DT, and for the GPIO
driver an additional translation would be required, to extract
the port and its relative pin number.
UART driver has to be initialized at PRE_KERNEL_1 (because of the
console using it) and currently the GPIO driver is initialized
at POST_KERNEL stage, so calling its API function form the UART
initialization routine was incorrect.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
clear RXNE flag in fifo_read, remove TEACK and REACK
check when uart_stm32_init because stm32f2 doesn't
has those flags.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
1. API function: uart_nrfx_irq_tx_enable is expected to enable and
trigger TXDRDY interrupt. Due to HW limiation before first byte has
been sent TXDRDY interrupt will not be triggered so it must be forced
by the software.
2. Common function: uart_nrfx_irq_tx_ready_complete is used for two
API entries: irq_tx_ready, irq_tx_complete because Nordic hardware does
not distinguish between them. This function returns 1 when driver is
ready to accept data and 0 otherwise.
3. Removed Hungarian prefixes.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Commit: 8a255eaf39
broke flow control initialization.
This PR adds missing:
- GPIO initialization for RTS and CTS.
- RTS and CTS pins assignment for flow control.
- Function for setting default hight state for TXD and RTS pins.
In addition obsolete cast to void has been removed.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.
signed-off-by: Karol Gugala <kgugala@antmicro.com>
Condition:
depends on ((SOC_SERIES_NRF52X || SOC_SERIES_NRF51X) && (!SOC_NRF52810))
for displaing configuration for UART0 peripheral has been replaced with:
depends on HAS_HW_NRF_UART0.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
In order to ease integration of new series, remove reference to
series in code activation. Use LPUART support Kconfig symbol instead.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove reference to SoC series in activation of TEACK/REACK flags
checks. Use flags definitions instead which is defined, if supported,
in STM32Cube packages.
Decouple the checks since REACK is not supported in some series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The nrfx uart driver will get stuck in uart_poll_out function since
the uart_console driver has been initialized at PRE_KERNEL_1 level
and is making calls to the uart driver before the uart driver has been
initialized.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
This symbol will be added by
https://github.com/zephyrproject-rtos/zephyr/pull/7915.
Having it in there doesn't hurt that much by itself (undefined symbols
default to 'n'), but I'm about to turn references to undefined Kconfig
symbols turn into an error.
Remove the reference.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
UART driver renamed to keep the same convention as SPI and TWI drivers.
All substrings: "UART_NRF5" in defines renamed to "UART_NRFX_UART".
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Replace all register defines and calls with Nordic nrfx HAL.
Simplification of uart shim - assumed only one uart instance.
Added parity bit to configuration options.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This patch corrects the way the INTENSET and INTENCLR registers are
accessed. When these registers are written with a bitmask, specified
bits are set or cleared in the INTEN (interrupt enabling) register,
so there is no need to read the previous state of these registers
(when they are read, the current state of INTEN is returned).
For INTENSET this patch eliminates only one unnecessary read, but for
INTENCLR the change is crucial because in the previous version any
write to the register disabled all the enabled interrupts.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
LPUART (Low-power UART) peripheral is just like ordinary U(S)ART
which lives in a separate clock/power domain.
Therefore already existing code could be reused as is
almost entirely.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
LBD interrupt manupulation makes sense for UART with LIN support only.
Otherwise this bit should not be touched.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
STM32Lx LPUART peripherals do not fit well into existing U(S)ART
port numbering scheme, so there will be two separate namespaces
in Kconfig: one for U(S)ARTs and one for LPUARTs.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
The trailing #endif comments used CONFIG_FE310_UART_{0,1} and they
should be CONFIG_UART_FE310_PORT_{0,1}.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_UART_NSIM depends on CONFIG_NSIM, which was removed in commit
9bc69a46fa ("boards: Update arc em_starterkit support from 2.2 to
2.3"). Remove the dependency, and also remove the CONFIG_NSIM=y setting
from the test_nsim test (which should now work).
Also change the condition for EXTERN()ing _VectorTable in
include/arch/arc/v2/linker.ld to check CONFIG_UART_NSIM instead of
CONFIG_NSIM. I'm guessing the EXTERN() is there to make the symbol
visible to nSIM, though I don't know anything about it.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Looks lik ARC arch snps_esmk can provide a 3rd port of this controller,
so let's add the necessary bits and pieces to get it instanciated if one
enable this port in DTS.
PCI settings are not introduced for that port as there is no known
arch/board exposing a 3rd port on PCI bus.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In order to check whether an interrupt is pending for the driver user,
the driver itself needs to verify what interrupt paths are enabled (RX
and or TX) so that as not to return true misleadingly.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The various macros to do checks in system call handlers all
implictly would generate a kernel oops if a check failed.
This is undesirable for a few reasons:
* System call handlers that acquire resources in the handler
have no good recourse for cleanup if a check fails.
* In some cases we may want to propagate a return value back
to the caller instead of just killing the calling thread,
even though the base API doesn't do these checks.
These macros now all return a value, if nonzero is returned
the check failed. K_OOPS() now wraps these calls to generate
a kernel oops.
At the moment, the policy for all APIs has not changed. They
still all oops upon a failed check/
The macros now use the Z_ notation for private APIs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix a somewhat rare race condition when the thread gets
preempted in the middle of sending a byte through UART.
If the other thread also sends another byte through UART
and "consumes" the EVENTS_TXDRDY value, the first thread
will get stuck in the while loop forever.
By moving the reset to the function start, we guarantee that
the baseline state of EVENTS_TXRDY is 1. Therefore, the first
thread will continue normally when it executes again.
Signed-off-by: Thiago Silveira <thiago@exati.com.br>
Maureen Helm