This patch adds a serial driver for the ARM PL011 IP block.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Modified drivers to use DEVICE_AND_API_INIT() instead of DEVICE_INIT()
This will make sure driver_api,is populated at build time and is exposed
to user space
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
Renaming Kconfig.nrf5 to Kconfig.nrf in the wake of extending
the use of the nRF clock control driver to both nRF5 and nRF91
SOC series.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit renames the nrf5_clock_control.h and
nrf5_clock_control.c files to nrf_clock_control.h and
nrf_clock_control.c, respectively, as they are used
in nRF9160 builds, as well.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to
CLOCK_CONTROL_NRF. The change is required to aleviates confusion
when selecting the symbol in nRF9160 SOC definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In driver and application code use the new device-tree values produced
by standard compatible-instance bindings.
As this code may be used as an example add a comment describing how the
binding instance number cannot be reliably used to distinguish multiple
instances.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
initialize both tx and rx in the spi_sam0 driver. Make the spi_sam
driver look the same by splitting the declaration into 2 lines.
Discovered with gcc 8.2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently, when usb_dc_ep_write is called, data is copied to the
internal buffer, hence the requirement for fragmentation, regardless
of low-level nrfx_usbd driver. This commit forces the fragmentation
and prevents potential internal buffer overflow. Adittional
fragmentation flag was added to prevent triggering status stage
(it is handled by hardware completely on nRF chips).
Fixes#12339
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
net_buf_linearize() used to clear the contents of output buffer,
just to fill it with data as the next step. The only effect that
would have is if less data was written to the output buffer. But
it's not reliable for a caller to rely on net_buf_linearize() for
that, instead callers should take care to handle any conditions
like that themselves. For example, a caller which wants to process
the data as zero-terminated string, must reserve a byte for it
in the output buffer explicitly (and set it to zero).
The only in-tree user which relied on clearing output buffer was
wncm14a2a.c. But either had buffer sizes calculated very precisely
to always accommodate extra trailing zero byte (without providing
code comments about this), or arguably could suffer from buffer
overruns (at least if data received from a modem was invalid and
filled up all destination buffer, leaving no space for trailing
zero).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
When tickless was disabled, this inverted test would never fire the
first interrupt and the timer would be silent. Just remove it.
There's no harm in unconditionally enabling a single timer interrupt
at boot.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().
The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.
Limitations:
+ Right now the SDK lacks an x86_64 toolchain. The build will fall
back to a host toolchain if it finds no cross compiler defined,
which is tested to work on gcc 8.2.1 right now.
+ No x87/SSE/AVX usage is allowed. This is a stronger limitation than
other architectures where the instructions work from one thread even
if the context switch code doesn't support it. We are passing
-no-sse to prevent gcc from automatically generating SSE
instructions for non-floating-point purposes, which has the side
effect of changing the ABI. Future work to handle the FPU registers
will need to be combined with an "application" ABI distinct from the
kernel one (or just to require USERSPACE).
+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
of all memory. No MMU/USERSPACE support yet.
+ We are building with -mno-red-zone for stack size reasons, but this
is a valuable optimization. Enabling it requires automatic stack
switching, which requires a TSS, which means it has to happen after
MMU support.
+ The OS runs in 64 bit mode, but for compatibility reasons is
compiled to the 32 bit "X32" ABI. So while the full 64 bit
registers and instruction set are available, C pointers are 32 bits
long and Zephyr is constrained to run in the bottom 4G of memory.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The HPET default is to deliver events on the same INTIn as the legacy
PIT IRQ, and in fact our code requires that because it uses the
"legacy routing" option. So this isn't really a configurable and has
to be set correctly. Do it right in the kconfig default instead of
forcing boards to set it.
(No, I have no idea where "20" came from either.)
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When used suitable config overlay, qemu_cortex_m3 with Ethernet
support can be started with just usual "make run".
An example of such overlay is included with samples/net/echo_server,
can be built and run with:
make BOARD=qemu_cortex_m3 \
CONF_FILE="prj.conf overlay-qemu_cortex_m3_eth.conf" run
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Instead of getting the base address from the MCUX headers, use the base
address from the device tree.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.
Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
1. optimize the baudrate calulation
2. For arc iot soc, the interval val is 4
3. before write any regs, the clk of uart must be enabled
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Use the page size retrieved via page layout in flash erase
shell command in case erase size is not given.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
Driver update to use GPIO driver for the reset control signal.
Driver update to use definitions from DTS including I2C address.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Update Kconfig for tlv320dac audio DAC to include GPIO
as a dependency. The codec driver now uses GPIO driver
to control the RESET for the DAC.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Convert the w25qxxdv driver to use device tree for SPI device params.
Updated the Arduino 101 config to use device tree to specify the SPI
flash. Update the arduino_101_sss to drop Kconfig support for the
w25qxxdv flash.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
In Kconfig.stm32, all UART port symbols were defined with a dependency
on symbol UART_STM32. This is redundant since they are located under
if UART_STM32 condition.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following recent renaming of STM32 UART Kconfig UART symbols,
LPUART was named as UART_LPUART_1.
Rename to LPUART_1.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Zephyr gecko drivers depend on libraries provided by the vendor. The
same libraries may also be used directly by the application code or
RAIL library. To facilitate the latter use case scenario this commit
adds Kconfig options to independently enable compilation of vendor
HAL library modules.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit adds missing I2C_GECKO Kconfig option which currently is
being set implicitly via .defconfig file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* Add support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The i2c_atmel_sam3 driver was deprecated at release 1.9, this commit
removes it. Also pinmux_dev_atmel_sam3x driver is removed.
i2c_atmel_sam3 was the last one which depended on it.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Remove configuration parameter CONFIG_BUS_TYPE. Now we may
make use of DT_ST_LSM6DSL_BUS_I2C and DT_ST_LSM6DSL_BUS_SPI
definition to select the bus.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Until now spi_flash_wb_write/read functions were only supporting
buffers that fit into a W25Q page (even if there were not checking
the offset was page aligned).
This change allows these function to read/write multiple W25Q page.
This change is required as the caller of these functions are not
aware of flash page size.
Signed-off-by: Johannes Hutter <johannes@proglove.de>
Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
Signed-off-by: Michael Wendland <michael@proglove.de>
The next commit will use this new
spi_flash_wb_write_protection_set_with_lock() in
spi_flash_wb_write() that already hold the lock.
To prevent a lock we need to skip the SYNC_LOCK when we want
to disable write protection.
Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
Preparation to introduce the Upper Link Layer (ULL) and
Lower Link Layer (LLL) split architecture.
- Move SoC dependent HAL to vendor specific folder.
- Preparation to split data structures into ULL and LLL
types.
- Added more role and state conditional compilations.
- Added some work-in-progress implementation of advertising
extensions, will be used as inspiration in the new split
architecture work.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Updates the MCUXpresso SDK to version 2.5.0 for applicable SoCs.
Wireless (KW*) and legacy (KL25) SoCs were not included in this
MCUXpresso SDK release and are therefore not updated here.
New in this release is SoC-level and board-level support for external
xip flash in the i.MX RT family.
For RT1050, we are now using the MCUXpresso SDK for the EVKB version of
the board, which correponds to an upgrade from A0 to A1 silicon.
However, we don't yet have Kconfigs in place to support A1 silicon part
numbers, and therefore add a simple cmake hack to convert A0 part
numbers to A1 part numbers.
The SDK flash driver interface also changed slightly in this release,
and thus the zephyr flash shim driver is updated accordingly.
Origin: MCUXpresso SDK
License: BSD 3-Clause
URL: mcux.nxp.com
Purpose: Provide device header files and bare metal peripheral drivers
for Kinetis, LPC, and i.MX SoCs.
Maintained-by: External
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
When MSI clock is available and in PLL-Mode (high accuracy), use it as
USB source clock. This allows to enable USB on STM34l475 disco iot
board without having to add external oscillator.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The Kconfig option ETH_SAM_GMAC was missing it's dependency on
NET_L2_ETHERNET. Before this patch Kconfig was allowing users to
enable the driver, but the driver was not added because the CMake code
only adds the driver when NET_L2_ETHERNET.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Andy Gross