Commit Graph

7 Commits

Author SHA1 Message Date
Savinay Dharmappa b05ba6b531 dts: x86: remove mem.h
patch removes the mem.h and marcos used in that file are
moved appropriate board files. As there are boards with
different flash configuration but of same soc, flash and
ram size are moved to dts file instead of dtsi

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-11-16 16:04:03 -05:00
Adithya Baglody 4a20aad15a dts: x86: RAM start address needs to be page aligned for arduino 101.
When CONFIG_X86_MMU is enabled for arduino 101 the start address
should be aligned to 4kB. If not aligned the page tables would not
be created and the build fails.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-11-13 10:21:58 -08:00
Savinay Dharmappa fa0ece1fb0 dts: x86: quark_se_c1000_devboard: Add device tree support
patch add device tree support for develoement board of
quark_se_c1000. Previously pushed patch was flashing binary
at wrong address because of which UART was not working

Jira:ZEP-2459

test

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-08-23 10:00:36 -04:00
Yannis Damigos 1a652e3ef1 dts: Remove memory node from skeleton dtsi file
Remove memory node from skeleton dtsi and add device_type
property in every memory node in soc dtsi files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-07-21 12:20:49 -05:00
Kumar Gala ddf3934d83 dts: Add missing compatible "mmio-sram"
Not all sram nodes had a compatible, so add one to those that are
missing.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-20 09:56:41 -05:00
Yannis Damigos 941ffb017b dts: Add cpus and cpu nodes missing properties
This patch adds #address-cell, #size-cell properties to
cpus container node and device_type, reg properties to
cpu node.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-07-19 14:28:08 -05:00
Savinay Dharmappa ce1add260b dts: x86: Add dts support for x86
patch adds necessary files and does the modification to the existing
files to add device support for x86 based intel quark microcontroller

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-06-22 10:23:39 -05:00