Commit Graph

5 Commits

Author SHA1 Message Date
Savinay Dharmappa 76676651f4 dts: intel_s1000: Enable generating IRQ priority.
patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller
Add dts support for multilevel DW interrupt controller

Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 9ee4929d56 dts: i2c: Add dts support for i2c
Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 97f721d928 dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00