Commit Graph

4 Commits

Author SHA1 Message Date
Henrik Brix Andersen 95226c056f dts: riscv: neorv32: add trng devicetree node
Add devicetree node for the NEORV32 True Random Number Generator (TRNG).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-10-26 17:53:15 -04:00
Henrik Brix Andersen b5d6f7f185 dts: riscv: neorv32: add gpio nodes
Add devicetree nodes for the NEORV32 GPIO device.

The GPIO port is 64 bits wide, but Zephyr only supports up to 32 bit
wide GPIO ports. The GPIO device is therefore handled as two Zephyr GPIO
devices with a nexus devicetree node mapping pins 0 to 31 to the device
handling the lower half, and pins 32 to 63 to the device handling the
upper half.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-10-15 09:46:53 -04:00
Henrik Brix Andersen 85963cbc02 dts: riscv: neorv32: add uart devicetree nodes
Add devicetree nodes for the NEORV32 UART devices.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-10-15 09:46:53 -04:00
Henrik Brix Andersen a281dbfb6d soc: riscv: privilege: add neorv32 processor suppport
Add support for the open-source NEORV32 RISC-V compatible processor
system (SoC).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-10-15 09:46:53 -04:00