Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin generation based on device tree. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds DTS bindings for sifive,pwm0, sifive,uart0, sifive,spi0, and riscv,plic0. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>