Commit Graph

253 Commits

Author SHA1 Message Date
Enjia Mai a1e388ea2e soc: xtensa: keep the CAVS old flasher still works
Keep the cavstwist.sh it is still working by specifying an
environment variable when CAVS_OLD_FLASHER is set. Provide
a fallback once the client-server-based tool does not work
well in some conditions.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-02 06:06:19 -04:00
Daniel Leung 1277c38797 cavs: disable timer interrupt on cpu power off
Since the timer interrupt is delivered to all cores at the same
time, it needs to be disabled (or masked) to prevent it from
waking a suspended CPU core.

Note that there is no need to re-enable (unmask) timer
interrupt separately as it is being taken care of in
smp_timer_init() when the CPU re-inits itself.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-07-01 14:04:50 -04:00
Guennadi Liakhovetski 3748bdcad6 xtensa: return to idle() when booting sporadically
To power down secondary cores on cAVS 2.5 platforms the primary core
enables the power-saving mode for the respective secondary core and
waits until that core enters idle() and executes the waiti
instruction at which point the core should enter a lower-power mode.
However, that core can then also automatically wake up and execute
its reset path if, e.g. an interrupt is delivered to it. However, it
isn't entirely clear which events are able to wake up cores from that
state. Disabling interrupts on the interrupt controller didn't seem
to prevent that from happening completely. In particular a specific
ADL notebook seems to be susceptible to this problem. Checking for
such sporadic boots and returning to idle fixes the problem.

BugLink: https://github.com/zephyrproject-rtos/zephyr/issues/46372
BugLink: https://github.com/thesofproject/sof/issues/5733
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-07-01 14:04:50 -04:00
Ederson de Souza afed5e4010 soc/xtensa/intel_adsp/tools: Dial back stream reset sleep
A full second is too much, and since "Ack local interrupt before
processing IPC" patch, it doesn't seem necessary. This whole second
wait would break tests that log too much content, as the firmware
is already running during the reset - and the host script wouldn't read
the contents, thus some of the logs would be overwritten.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-30 06:13:30 -04:00
Jaroslaw Stelter 8632986746 soc: intel_adsp: Add lib_code module type.
External libraries can contain processing module code or common library
code. Library manager need to distinguish between both type of modules
for proper loading.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-06-29 10:41:59 -04:00
Ederson de Souza 7ab8607e71 soc/xtensa/intel_adsp/tools: Ack local interrupt before processing IPC
It seems a race can happen between the host acknowledging a DONE
interrupt and the DSP being able to mark some IPC as done. To avoid
this, the host script now always acknowledges the DONE interrupt
_before_ processing the IPC message.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-28 14:56:57 -04:00
Ederson de Souza 4fd8d474ec soc/xtensa/intel_adsp/tools: Do not use grep Perl extensions
They may be disabled in some environments (such as Gentoo based
developer mode on Chromebooks). Use extended regular expressions
instead.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-27 15:41:00 -05:00
Ederson de Souza 0ce9446978 soc/xtensa/intel_adsp: Add cAVS clock driver
Simple driver that allows one to choose the clock speed of xtensa cores.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-27 12:42:04 +02:00
Lauren Murphy 318e6db239 debug: coredump: add xtensa intel adsp, support toolchains
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.

Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.

Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-06-23 15:44:45 -04:00
Anas Nashif bc38f25178 intel_adsp: fix typo PLATFORM_INIT_LPRSRAM -> PLATFORM_INIT_LPSRAM
Fix typo in define preventing initialization of LPSRAM.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-22 12:16:41 +02:00
Rafal Redzimski bd46470167 xtensa: intel_adsp: add rom jump address definition
Add the definition of address which is used by ROM to jump to FW.

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-21 14:01:01 -04:00
Anas Nashif 09cd218cde intel_adsp: use arch_proc_id() instead of local function
Use arch_proc_id interface instead of locally defined function.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-21 10:48:28 +02:00
Anas Nashif fa843d308e i2s: remove s1000 i2s driver
Remove intel_s1000_crb drivers. The board is no longer available or
supported in the zephyr tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-13 16:19:51 -04:00
Jaska Uimonen 44ef4c4737 dma/cavs_hda: write aligned size to DGMBS register
Write aligned size also to DGMBS register. At least SOF with linux
host and cavs25 seems to need this for the dma to trigger.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-06-09 11:34:32 +02:00
Andy Ross 12eda76939 arch/xtensa: Add CCOUNT-based timing API
Expose the Xtenesa CCOUNT timing register (the lowest level CPU cycle
counter) using the arch_timing_*() API.

This is the simplest possible way to get this working.  Future work
might focus on moving the rate configuration into devicetree in a
standard way, integrating with the platform clock driver on intel_adsp
such that the reported cycle rate tracks runtime changes (though IIRC
this is not a SOF requirement), and adding better test coverage to the
timing layer, which right now isn't exercised anywhere but in
benchmarks.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-06-07 19:04:42 +02:00
Ederson de Souza 3209bc1a4a soc/xtensa/intel_adsp/tools: Make cavstool.py DSP resetting more stable
When using more than one core on cavs25, some hangs were made
"persistent", as it seems not all cores were being properly reset, thus
compromising tests - if a test hangs for any reason, subsequent tests
that were not restrict to a single CPU would also fail.

This patch mitigates these issues by two changes:
  - Closely mimics SOF Linux driver way of loading the firmware. So,
    explicit stall and reset (and "unstall" and "unreset") of cores, with
    appropriate checks that states have been reached;
  - More generous sleep before resetting the stream.

Also, the status of ADSPCS (Audio DSP Control and Status) register is
logged more thoroughly to aid debugging in case new issues arise.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-07 11:51:37 +02:00
Enjia Mai 415b47c4ac soc: xtensa: rename the cavstool back for backward compatibility
The name change for cavstool.py has also broken the backward
compatibility for SOF testing. Rename cavstool_server.py back
to cavstool.py. Keep the functionality still as same as the previous
one.

And also update the documentation of it.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-06 22:46:52 +02:00
Enjia Mai 027dcdeae8 soc: xtensa: fix the direct usage of log only and loading firmware
The new client-server-based cavstool has broken the SOF CI testing
due to not considering that loading firmware and output log directly
without daemon is still necessary. Fix that when it is not running
as a daemon.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-06 22:46:52 +02:00
Enjia Mai a0c64cbbb1 boards: xtensa: Activate the intel_adsp west runner
Make the intel_adsp west runner starting to work on all the
intel_adsp boards. Changes include:

1. Make the cavstool.py work as a service in remote host
   ADSP board and rename it to cavstool_server.py.

2. Active the runner and adds a common board.cmake file to
   specify the default signing key for cavs boards.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-05 14:13:57 +02:00
Enjia Mai 01b0c73ece soc: intel_adsp: add a client-server based cavstool tool
The cavstool_client.py is a client use to communicate with
the firmware loading and running server which dealing with
the requests from the intel_adsp west runner. It supports:

1. Download firmware to remote ADSP host and running.
2. Send the ADSP log messages back to client.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-05 14:13:57 +02:00
Gerard Marull-Paretas d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas 0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Ederson de Souza ddb779e31d soc/xtensa/intel_adsp/tools: Make cavstwist.sh accept ssh port
Sometimes the remote ssh server is not on default port. This patch makes
cavstwist.sh accept an ssh port in the host address: host[:port].

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-05-05 17:00:31 -04:00
Tom Burdick 6913da9ddd logging: cAVS HDA based logger
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.

The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-05-04 18:56:13 -04:00
Daniel Baluta c3c026e03c arch/xtensa: adsp: Rename module_init section
.module_init sections is used to keep all components constructor
functions.

Zephyr uses -ffunction-sections option which will create a section for
each function. Unfortunately, this creates a section named .module_init
for the function module_init() used to initialize the processing module
generic layer.

Thus, places module_init() in the constructor area named .module_init
which is wrong.

To avoid this we rename .module_init section for constructors to
.initcall.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2022-04-26 15:54:46 -04:00
Yuval Peress ae5945d7be soc: xtensa: fix missing rodata section in intel_adsp
The common linker script for cavs_v?? was missing an include for the
snippets-rodata.ld file which is needed for any applications using the
`zephyr_linker_source(RODATA <linker_script>)` cmake function.

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-26 14:29:18 -04:00
Tom Burdick 2f320730a1 dma/cavs_hda: Adds link in/link out compatibles
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-18 19:19:40 -04:00
Ederson de Souza c0b7864840 arch/xtensa: Enable backtrace on panic on Intel ADSP platforms
Platform specific functions necessary to enable this feature were
implemented (z_xtensa_ptr_executable() and
z_xtensa_stack_ptr_is_sane() for Intel ADSP platforms.

Current implementation just ensures stack pointer and program counter
are within relevant areas defined in the linker scripts, without going
too fine grained.

Also, `.iram1` section, used by the backtrace code, also added to
Intel ADSP linker script.

Finally, update west manifest to use up-to-date SOF, which contains a
patch to fix build issues related to the linker changes.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-04-14 11:03:40 -04:00
Kai Vehmanen 5be08296d6 soc/intel_adsp: XTENSA_WAITI_BUG must be set of cAVS1.8 and newer
Align definitions with definitions used in SOF upstream and define
CONFIG_XTENSA_WAITI_BUG for cAVS1.8, cAVS2.0 and cAVS2.5 platforms. On
these platforms, a workaround is needed with waiti.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-04-11 08:29:06 -04:00
Adrian Bonislawski a52aa7f2ab soc/intel_adsp: set default cavs kconfig to cavs platforms only
This will set intel cavs kconfig to cavs platforms only

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-04-06 14:43:18 -04:00
Gerard Marull-Paretas c925b5991a include: remove unnecessary autoconf.h includes
The autoconf.h header is not required because the definitions present in
the file are exposed using the compiler `-imacros` flag.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-05 11:18:20 +02:00
Yuval Peress 5416abfe5f util: convert wait_for macro to uppercase
This macro conflicts with C++'s std::condition_variable::wait_for
and makes it very difficult to use Zephyr with C++. Replace it with
an all uppercase name which fits the naming standard better.

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-04 09:50:28 -05:00
Tom Burdick 9933f18ad3 dma/cavs_hda: Provide pending/free byte lengths
In status the pending/free byte lengths are now provided

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick 602ef3fb0e soc/intel_adsp: Require definitions for cavs_hda.h
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick e018a3dff7 dma/cavs_hda: DMA driver for HDA on cAVS
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.

Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF

Simple test case is provided for both drivers.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick cc6e9c094a soc/intel_adsp: Low level HDA driver and tests
Adds a header only low level driver for HDA streams along with smoke
tests to ensure basic host in and out stream functionality.

The tests require host side interaction. In cavstool a new HDAStream
class encapsulates somewhat a single stream and its registers. This
is manipulated in the tests using IPC with the Host ensuring that a
specific order of operations is done.

This low level driver allows testing certain hardware configurations
and flows with easy to use register dump debugging. It is not
intended to be the end API an application might use. That would be
a DMA driver using this.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick 345a536794 soc/intel_adsp: common testing code in cavstool.h
The IPC enum definition and WAIT_FOR macro are useful outside of
the board smoke tests for intel_adsp. They can be commonly used
by other board tests for a variety of peripherals that require
DSP and Host interaction (using cavstool).

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Kai Vehmanen 199048b2ed soc/intel_adsp: boot: simplify the ifdef rules for cAVS versions
Only cAVS15 is different in terms of definitions, so the ifdef logic can
be simplified quite a bit. Also reorder some of the definitions to
improve readability. No functional change.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-03-28 14:03:41 -04:00
Kai Vehmanen 3cead66939 soc/intel_adsp: fetch HPSRAM bank count from devicetree
Replace the Kconfig ifdefs with direct query from devicetree.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-03-28 14:03:41 -04:00
Jaska Uimonen b22d8bfc46 soc/intel_asdp: take ownership of i2s and dmic registers
Take ownership of i2s and dmic registers as otherwise they are
not accessible.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-03-25 14:40:31 -04:00
Nazar Kazakov f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Rander Wang 8d821a587f soc: intel_adsp: update UUIDs of BRNGUP and BASEFW
The SOF ipc4 driver and Windows driver can't work with
SOF built with zephyr and ipc4 configuration on cAVS 1.8+
platforms. Because the UUIDs of BRNGUP and BASEFW are
copied from APL (cAVS 1.5), which is incompatible with
cAVS 1.8+ platforms.

This patch updates BRNGUP and BASEFW to use cAVS 1.8+ UUIDs.

Signed-off-by: Chao Song <chao.song@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@intel.com>
2022-03-16 13:46:00 -04:00
Tomasz Bursztyka 173cfad8cb soc: Check and fix const qualifier on ISR
Re-running the script that checks for the const qualifier missing on
ISR's parameter.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-03-16 12:33:12 +01:00
Kai Vehmanen ec7451b485 soc/intel_adsp: add support for Intel Jasper Lake
Add a variant of Intel cAVS2.0 used in Jasper Lake based
products.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-03-10 09:26:41 -06:00
Kai Vehmanen 209331734b xtensa: intel_adsp: use cavs_ipc driver only if enabled in Kconfig
Commit bdce0a5742 ("soc/intel_adsp: Add a cavs_ipc driver to manage
host IPC") added a new driver for cAVS IPC. Although patch included the
CONFIG_CAVS_IPC option, in practise this had no effect and instead
driver was enabled whenever device tree included IPC hardware. This
caused IPC errors in SOF application builds where two drivers, one out
of tree in SOF and one in Zephyr, initialize the same hardware.

Fix the issue by enabling the driver only when CONFIG_CAVS_IPC is
enabled.

BugLink: https://github.com/thesofproject/sof/issues/5477
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-03-07 16:35:30 -05:00
Tom Burdick 6a0837af2c soc/intel_adsp: Dedup the Kconfig driver options
The same options were copied to each Kconfig.defconfig, in different
places (my own doing) for both DMA and I2S. This dedups the defines and
moves them into the common soc Kconfig.defconfig.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-03-03 08:50:41 -05:00
Konrad Leszczynski 1247bd75b3 xtensa: intel_adsp: make common rimage_modules.c cavs-specific
Make xtensa/intel_adsp/common/rimage_modules.c CAVS-specific by adding a
guard.

Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-01 16:20:42 -05:00
Konrad Leszczynski 1236e309db xtensa: intel_adsp: make common boot.c cavs-specific
Make xtensa/intel_adsp/common/boot.c CAVS-specific by adding a guard.

Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-01 16:20:42 -05:00
Anas Nashif 79f86ad3be intel_adsp: some SoCs boot core0 differently
Make the boot process CAVS specific.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-01 16:20:42 -05:00
Anas Nashif 6e10011f9b intel_adsp: init soc only for SoCs marked as ADSP_CAVS
Skip the soc init for not CAVS SoCs. This will be done in the non-CAVS
SoC soc.c.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-03-01 16:20:42 -05:00