Commit Graph

517 Commits

Author SHA1 Message Date
Enjia Mai a1e388ea2e soc: xtensa: keep the CAVS old flasher still works
Keep the cavstwist.sh it is still working by specifying an
environment variable when CAVS_OLD_FLASHER is set. Provide
a fallback once the client-server-based tool does not work
well in some conditions.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-02 06:06:19 -04:00
Daniel Leung 1277c38797 cavs: disable timer interrupt on cpu power off
Since the timer interrupt is delivered to all cores at the same
time, it needs to be disabled (or masked) to prevent it from
waking a suspended CPU core.

Note that there is no need to re-enable (unmask) timer
interrupt separately as it is being taken care of in
smp_timer_init() when the CPU re-inits itself.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-07-01 14:04:50 -04:00
Guennadi Liakhovetski 3748bdcad6 xtensa: return to idle() when booting sporadically
To power down secondary cores on cAVS 2.5 platforms the primary core
enables the power-saving mode for the respective secondary core and
waits until that core enters idle() and executes the waiti
instruction at which point the core should enter a lower-power mode.
However, that core can then also automatically wake up and execute
its reset path if, e.g. an interrupt is delivered to it. However, it
isn't entirely clear which events are able to wake up cores from that
state. Disabling interrupts on the interrupt controller didn't seem
to prevent that from happening completely. In particular a specific
ADL notebook seems to be susceptible to this problem. Checking for
such sporadic boots and returning to idle fixes the problem.

BugLink: https://github.com/zephyrproject-rtos/zephyr/issues/46372
BugLink: https://github.com/thesofproject/sof/issues/5733
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-07-01 14:04:50 -04:00
Glauber Maroto Ferreira fb919a75ba soc: esp32/s2/c3: pinctrl: update pin init macros
Updates pin initialization macros to make use
of pin grouping.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-07-01 16:22:18 +00:00
Ederson de Souza afed5e4010 soc/xtensa/intel_adsp/tools: Dial back stream reset sleep
A full second is too much, and since "Ack local interrupt before
processing IPC" patch, it doesn't seem necessary. This whole second
wait would break tests that log too much content, as the firmware
is already running during the reset - and the host script wouldn't read
the contents, thus some of the logs would be overwritten.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-30 06:13:30 -04:00
Jaroslaw Stelter 8632986746 soc: intel_adsp: Add lib_code module type.
External libraries can contain processing module code or common library
code. Library manager need to distinguish between both type of modules
for proper loading.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-06-29 10:41:59 -04:00
Ederson de Souza 7ab8607e71 soc/xtensa/intel_adsp/tools: Ack local interrupt before processing IPC
It seems a race can happen between the host acknowledging a DONE
interrupt and the DSP being able to mark some IPC as done. To avoid
this, the host script now always acknowledges the DONE interrupt
_before_ processing the IPC message.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-28 14:56:57 -04:00
Ederson de Souza 4fd8d474ec soc/xtensa/intel_adsp/tools: Do not use grep Perl extensions
They may be disabled in some environments (such as Gentoo based
developer mode on Chromebooks). Use extended regular expressions
instead.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-27 15:41:00 -05:00
Ederson de Souza 0ce9446978 soc/xtensa/intel_adsp: Add cAVS clock driver
Simple driver that allows one to choose the clock speed of xtensa cores.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-27 12:42:04 +02:00
Lauren Murphy 318e6db239 debug: coredump: add xtensa intel adsp, support toolchains
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.

Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.

Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-06-23 15:44:45 -04:00
Sylvio Alves 54ca96f523 soc: esp32: opt to make device handles in dram
ESP32 linker loader needs all sections to be align correctly.
When MCUBoot is enabled, device handles provide by device-handles.ld
does not make the ALIGN(4) at the end, which breaks the loader
initialization. This PR make sure that this particular section
is placed in DRAM instead.

For now this is a workaround until this can be handled in loader script.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-06-22 12:27:43 +02:00
Sylvio Alves 8e04acab3b linker: esp32: fix flash linking reference
Referenced spi_flash_rom_patch.c object was wrongly
linked, which can cause crash due to flash cache disabled
operation.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-06-22 12:27:32 +02:00
Anas Nashif bc38f25178 intel_adsp: fix typo PLATFORM_INIT_LPRSRAM -> PLATFORM_INIT_LPSRAM
Fix typo in define preventing initialization of LPSRAM.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-22 12:16:41 +02:00
Rafal Redzimski bd46470167 xtensa: intel_adsp: add rom jump address definition
Add the definition of address which is used by ROM to jump to FW.

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-21 14:01:01 -04:00
Anas Nashif 09cd218cde intel_adsp: use arch_proc_id() instead of local function
Use arch_proc_id interface instead of locally defined function.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-21 10:48:28 +02:00
Stephanos Ioannidis c40949a389 soc: esp32s2: Drop IRAM_ATTR from forward declarations
This commit drops the `IRAM_ATTR` macro from the function declarations
because:

1. `IRAM_ATTR` macro makes use of the `__COUNTER__` preprocessor macro,
which increments for every macro invocation and causes the section
specified in the forward declaration to not match that of the
function definition.

2. Section attributes need not be specified for forward declarations.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-06-20 10:28:06 +02:00
Krzysztof Chruscinski c5f2cdef09 logging: Remove logging v1 from the logging
Remove v1 implementation from log_core and all references in the tree.
Remove modules used by v1: log_list and log_msg.
Remove Kconfig v1 specific options.
Remove Kconfig flags used for distinction between v1 and v2.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-06-16 10:51:15 -04:00
Anas Nashif fa843d308e i2s: remove s1000 i2s driver
Remove intel_s1000_crb drivers. The board is no longer available or
supported in the zephyr tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-13 16:19:51 -04:00
Anas Nashif 798a552daf boards: intel_s1000_crb: remove board/soc
Remove the intel_s1000_crb board. it is no longer available or supported
in the zephyr tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-13 16:19:51 -04:00
Jaska Uimonen 44ef4c4737 dma/cavs_hda: write aligned size to DGMBS register
Write aligned size also to DGMBS register. At least SOF with linux
host and cavs25 seems to need this for the dma to trigger.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-06-09 11:34:32 +02:00
Andy Ross 12eda76939 arch/xtensa: Add CCOUNT-based timing API
Expose the Xtenesa CCOUNT timing register (the lowest level CPU cycle
counter) using the arch_timing_*() API.

This is the simplest possible way to get this working.  Future work
might focus on moving the rate configuration into devicetree in a
standard way, integrating with the platform clock driver on intel_adsp
such that the reported cycle rate tracks runtime changes (though IIRC
this is not a SOF requirement), and adding better test coverage to the
timing layer, which right now isn't exercised anywhere but in
benchmarks.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-06-07 19:04:42 +02:00
Ederson de Souza 3209bc1a4a soc/xtensa/intel_adsp/tools: Make cavstool.py DSP resetting more stable
When using more than one core on cavs25, some hangs were made
"persistent", as it seems not all cores were being properly reset, thus
compromising tests - if a test hangs for any reason, subsequent tests
that were not restrict to a single CPU would also fail.

This patch mitigates these issues by two changes:
  - Closely mimics SOF Linux driver way of loading the firmware. So,
    explicit stall and reset (and "unstall" and "unreset") of cores, with
    appropriate checks that states have been reached;
  - More generous sleep before resetting the stream.

Also, the status of ADSPCS (Audio DSP Control and Status) register is
logged more thoroughly to aid debugging in case new issues arise.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-07 11:51:37 +02:00
Enjia Mai 415b47c4ac soc: xtensa: rename the cavstool back for backward compatibility
The name change for cavstool.py has also broken the backward
compatibility for SOF testing. Rename cavstool_server.py back
to cavstool.py. Keep the functionality still as same as the previous
one.

And also update the documentation of it.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-06 22:46:52 +02:00
Enjia Mai 027dcdeae8 soc: xtensa: fix the direct usage of log only and loading firmware
The new client-server-based cavstool has broken the SOF CI testing
due to not considering that loading firmware and output log directly
without daemon is still necessary. Fix that when it is not running
as a daemon.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-06 22:46:52 +02:00
Enjia Mai a0c64cbbb1 boards: xtensa: Activate the intel_adsp west runner
Make the intel_adsp west runner starting to work on all the
intel_adsp boards. Changes include:

1. Make the cavstool.py work as a service in remote host
   ADSP board and rename it to cavstool_server.py.

2. Active the runner and adds a common board.cmake file to
   specify the default signing key for cavs boards.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-05 14:13:57 +02:00
Enjia Mai 01b0c73ece soc: intel_adsp: add a client-server based cavstool tool
The cavstool_client.py is a client use to communicate with
the firmware loading and running server which dealing with
the requests from the intel_adsp west runner. It supports:

1. Download firmware to remote ADSP host and running.
2. Send the ADSP log messages back to client.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-06-05 14:13:57 +02:00
Fabio Baltieri e24314f10f include: add more missing zephyr/ prefixes
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-27 15:20:27 -07:00
Yuval Peress 86cadf9283 ztest: Fix userspace ztests in new API
Update the new API to use K_USER as the flags for both
CONFIG_USERSPACE and CONFIG_TEST_USERSPACE. Also, fix the linker
script to properly include the suites, tests, and rules.

Fixes #44108

Signed-off-by: Yuval Peress <peress@google.com>
2022-05-25 11:20:13 +09:00
Sylvio Alves 8148449db0 soc: esp32: move libc strings in dram area
Move libc strings to RAM area so that ESP32
doesn't crash when flash cache is disabled

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-20 12:36:36 +02:00
Sylvio Alves f3d2dd2b6c soc: esp32: move phy tx power to soc config
PHY TX power configuration must be added into soc level.
It was previously hardcoded in hal_espressif, which was removed.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-17 18:11:50 +02:00
Sylvio Alves 896809bfcc soc: esp32s2: add _gettimeofday_r workaround
Add reentrant _gettimeofday_ call so that build
won't fail. This is only a workaround for now.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 9d4d144377 linker: esp32s2: changes to enable newlibc and cpp support
This PR adds missing configuration to enable newlibc
and cpp code to run in ESP32S2 SoC. This isn't enough though.
Toolchain changes are also needed and will come up next.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 3b83e39e16 soc: esp32: decrease region 1 default pool size
Make the available heap for the 128k bank smaller
so that it frees up space for some samples
as pktqueue and smp. In the context of toolchain,
this enables having twister test to pass in those tests
that requires more memory.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves c9f6d18dfc soc: esp32: add Espressif HAL config
Current Espressif porting requires standard include as
part of hal implementation. compiler_flags.cmake checks for
variant name to keep those stdinc in build.
Instead of using variant name as check, use this new CONFIG
to make it clear and to allow having toolchain integrated
in zephyr-sdk package.
stdinc dependency in hal_espressif will be worked out and removed
soon.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves a53e3c1b2b soc: esp32: add toolchain name
Add ESP32 and ESP32S2 toolchain name that is addressed
when integrated with zephyr-sdk.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves b6ab394d14 soc: esp32: add _gettimeofday_r workaround
Add reentrant _gettimeofday_ call so that build
won't fail. This is only a workaround for now.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves e131679d99 linker: esp32: changes to enable newlibc and cpp support
This PR adds missing configuration to enable newlibc
and cpp code to run in ESP32 SoC. This isn't enough though.
Toolchain changes are also needed and will come up next.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Gerard Marull-Paretas d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas 0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Ederson de Souza ddb779e31d soc/xtensa/intel_adsp/tools: Make cavstwist.sh accept ssh port
Sometimes the remote ssh server is not on default port. This patch makes
cavstwist.sh accept an ssh port in the host address: host[:port].

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-05-05 17:00:31 -04:00
Tom Burdick 6913da9ddd logging: cAVS HDA based logger
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.

The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-05-04 18:56:13 -04:00
Sylvio Alves 6c6b688b91 driver: spi: esp32: update flash driver to use hal
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-02 10:30:24 -05:00
Daniel Baluta c3c026e03c arch/xtensa: adsp: Rename module_init section
.module_init sections is used to keep all components constructor
functions.

Zephyr uses -ffunction-sections option which will create a section for
each function. Unfortunately, this creates a section named .module_init
for the function module_init() used to initialize the processing module
generic layer.

Thus, places module_init() in the constructor area named .module_init
which is wrong.

To avoid this we rename .module_init section for constructors to
.initcall.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2022-04-26 15:54:46 -04:00
Yuval Peress dd82f91ebd soc: xtensa: fix missing rodata section in intel_s1000
The linker script for the intel_s1000 was missing an include for the
snippets-rodata.ld file which is needed for any applications using the
`zephyr_linker_sources(RODATA <linker_script>)` cmake function.

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-26 14:29:18 -04:00
Yuval Peress ae5945d7be soc: xtensa: fix missing rodata section in intel_adsp
The common linker script for cavs_v?? was missing an include for the
snippets-rodata.ld file which is needed for any applications using the
`zephyr_linker_source(RODATA <linker_script>)` cmake function.

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-26 14:29:18 -04:00
Sylvio Alves cb8c2d740b soc: esp32s2: linker script clean up
This PR removes common-rom.ld section so that logging sections
can now be mapped into RAM area.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-04-26 14:26:53 -04:00
Sylvio Alves ac9c14d7d7 soc: esp32: linker script clean up
This PR removes common-rom.ld section so that logging sections
can now be mapped into RAM area.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-04-26 14:26:53 -04:00
Glauber Maroto Ferreira a29d62f64d soc: esp32/s2/c3: make PINCTRL config default
through the selection of PINCTRL config
at the SoC level.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Glauber Maroto Ferreira 2b44028777 drivers: pinctrl: esp32s2: initial support
add initial pinctrl driver support for ESP32S2.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00
Glauber Maroto Ferreira 135f4f772a drivers: pinctrl: esp32: initial support
add initial pinctrl driver support for ESP32.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-04-20 13:27:47 +02:00