Commit Graph

3 Commits

Author SHA1 Message Date
Katsuhiro Suzuki 32f23059a2 dts: bindings: add IRQ priority support for SiFive PLIC
This patch adds IRQ priority support for SiFive PLIC by device-tree.
Some IRQ sources of plic use Kconfig to set priority of their IRQ.

- AON: no driver
- I2C, SPI, PWM: not use IRQ
- GPIO, UART: default 1

So this patch specifies IRQ priority 1 for all sources.

Currently these drivers (gpio and uart) do not support that they get
and use IRQ priority from device-tree. We need more patches.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-14 12:43:58 -06:00
Kumar Gala 3d4fa57541 dts: riscv: Remove device_type = "memory" from SRAM nodes
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-06 08:59:22 -04:00
Nicolas Pitre 1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00