The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The '#if XIP' in the DTS file never worked properly,
causing the QEMU build to think it has much more RAM
then it actually has. If RAM overflowed, this would not
be caught by the build, instead there would be strange
crashes when the data copy takes place.
The QEMU targets themselves are not XIP, everything
is actually RAM, but the first 4 megabytes are
considered to be a memory-mapped flash region. This
is done to ensure that the XIP data copying infrastructure
doesn't bit-rot on x86. We are at the point where
a lot of things depend on this, so just select it in
the board Kconfig instead of enabling in the
defconfigs.
Fixes: #15835
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
A new function pcie_irq_enable() is added to be used in lieu of
irq_enable() when the target device is PCI(e)-attached. The function
attempts to use MSI, when configured in the kernel and supported by
the endpoint; failing that, it will verify that IRQ requested is in
fact routed to the device by the boot firmware before enabling it.
The NS16550 UART driver is updated to use pcie_irq_enable().
The PCI(e) shell is extended to dump information about wired IRQs.
The up_squared devicetree is fixed (reverted?) to IRQ5 for UART1.
The galileo enables MSI by default.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Reduced flash size for QEMU x86 so it does not consume a lot of RAM
memory where it is simulated.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
This commit adds a flash driver implementation that writes to RAM and
exports statistics through stats.h. It can be used to simulate flash
memory for testing purposes.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
We already select HAS_DTS at the arch level for X86 so we don't need to
duplicate it at the board level.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to generalize the currently specialized nRF51 IC setup hook,
make the following changes:
- Generalize the hook to bt_ic_setup()
- Use a weak NOP version by default
- Move the currently existing one to the board folder
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Fixes broken CC2520 on quark_se_c1000_devboard configuration after
commit 25d17db.
Fixes#15070
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
For some reason we dropped the simulation keyword and this platform is
not running any tests, we are just building the tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On Clear Linux, the CFLAGS is set and defines a number of aggressive
checks and optimizations. This causes a build failure when generating a
GRUB2 boot loader image using the 'build_grub.sh' script.
Unsetting it within the script allows it to proceed and successfully
build a functional GRUB2 boot loader image to be used with Zephyr.
Fixes: #14289
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
One of the bullet list items didn't get rendered properly because
continuation line wasn't indented.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Move the original documentation in the arduino_101 board to a common
section in the Bluetooth documentation and document the use of `btmon`
in general.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Based on prior work by @dcpleung. It's suboptimal, but it provides a
working starting point for ACRN work. The x86 board/SoC abstractions
really need to be refactored to make this "board" (and other x86-based
"boards", both extant and future) cleaner and easier to maintain. Punt.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
It is also possible to use 'west' to build the 'hello_world' sample
application for the UP2 (up_squared) board. This patch makes it
explicit in the documentation.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Linking to API material requires knowing the pecularities of how
doxygen, sphinx, and breathe work. In an attempt to hide some of this
we're preparing the current docs to allow use of configuration defaults
that will let us more simply use a default role that will hunt for a
reference target in the various domains that are available by using a
default "role" of "all". This will let us use the simple notation
`functionname` or `typename` without fully specifying the reference as
:c:func:`functionname`.
This patch cleans up exising docs that were (incorrectly) using single
backtics where double backtics should have been used, and also found
some typos (such as a space between the role name and the reference,
such as :file: `filename`, and a missing colon such as
c:func:`functionname`)
This is a start to address issue #14313
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The build_grub.sh script cherry-picks 3 commits from the master branch
of grub because more recent build tools fail to build the latest stable
release (which is 2.02). This solves the problem on Fedora 29 for
example, but is not sufficient for Clear Linux.
This patch modifies the build_grub.sh script to use
grub-2.02-285-g5bc41db75 (latest from master as of 13 of March 2019).
That version compiles 'out-of-the-box' in the latest Ubuntu, Fedora and
Clear Linux.
There are additional tools required on the host system and the
documentation has been updated accordingly.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This build target is intended to verify that enabling the
IAMCU ABI doesn't have any bit-rot since we can easily
run this under emulation.
However, the QEMU boards all derive from the generic IA32
SOC definition, which is any pc-like hardware. We need
to disable these mitigations for this target since the
IAMCU compiler doesn't even recognize instructions like
'lfence'.
Fixes: #14315
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fedora 29 (and possibly other disctributions) are nowadays coming with
very recent versions of gcc (8.x) and binutils. These will cause some
compilation error when running the 'grub_build.sh' script to create a
GRUB2 boot loader image.
Fortunately, both issues have been fixed and merged in the upstream
project. This patch modifies the build script to cherry-pick those to
the local cloned version of grub before building it.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
A new role :zephyr_file: is available that renders to a link to the file
or folder in GitHub. Find appropriate references using :file: and
convert to :zephyr_file: to take advantage of its linking capability.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Most of these are from source'ing a file within an 'if PINMUX', and then
adding another 'depends on PINMUX' within it.
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. There are no "conditional includes" in Kconfig, so
'if FOO' has no special meaning around a 'source'. Conditional includes
wouldn't be possible, because an 'if' condition could include (directly
or indirectly) forward references to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
According with MISRA-C every switch-clause must terminate with an
unconditional break.
MISRA-C rules 16.1 and 16.3
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
UART_QMSI_0_BAUDRATE was removed by commit 17c6456678 ("drivers/uart:
Use dts to set uart priorities for QMSI driver").
There's a reference to CONFIG_UART_QMSI_1_BAUDRATE as well, but getting
rid of it requires documentation updates.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.
Fix#13753
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Recent versions of GCC won't build grub-2.02 because they're more
pedantic about warnings. This has been fixed upstream but is not
yet part of any release. The build script is modified to apply the
relevant commits before building.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Added more detailed information how to connect Zephyr instance
to host system like Linux desktop.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Fix setting of the I2C bus master device name for the GPIO_PCAL9535A
device and PWM_PCA9685. We need to extract them from the dts otherwise
they will just get set to "".
Fixes#13458
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Be consistent in how board docs are named and move all to index.rst.
This will make the URL to the board documentation predictable and easier
to remember.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We've removed the QMSI RTC driver as part of the new counter API. So
any old rtc tests don't build for QMSI based boards anymore. Switch
this from 'rtc' to 'counter' in the board.yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.
PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.
Remove the old style 32-bit tables to make the x86 port
easier to maintain.
Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Charles E. Youse