This helps simplify code that was previously combining net_buf_add()
with memcpy().
Change-Id: If44cf9cd651aba5e544e36567869f147468663eb
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This moves the shell component into its own subsys and groups all
related files and options into a single place.
Additionally, one Kconfig option will now be required to enable the
shell:
CONFIG_CONSOLE_SHELL=y
The header files was also moved to include/shell/shell.h and can be now
referenced with
#include <shell/shell.h>
instead of
#include <misc/shell.h>
Updated documentation as well.
Change-Id: Iffbba4acfa05408055e9fd28dffa213451351f94
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.
Keep the legacy samples/tests as is.
Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduce random device API analgous to other device driver classes in
Zephyr. Modify the the KSDK random driver to implement the API.
We retain the sys_rand32_get() interface for now on the assumption it
will eventually relocate to or be otherwise replaced by an entropy
management system.
The existing TEST_RANDOM_GENERATOR related drivers that do not
generate entropy are not modified to expose this driver API since they
cannot generate entropy.
Change-Id: I60b2d5afddf242e802a1d9014c99579870fb7472
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The GPIO_INT_LEVEL value is zero so the mask assignement
is never executed. Using the bit complement GPIO_INT_EDGE
the proper mask is assigned
This issue was reported by Coverity
Coverity-CID: 151966
Change-Id: Iacfeb6466388023bd6123ba86280aa9ca15f34e4
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Not all users are in an ISR context where we can't block, so give the
callers the freedom to choose if they want to block or not.
Jira: ZEP-1481
Change-Id: I19bd7e2df94c4eeb60886a17a78f872bd7bea887
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
When CONFIG_SYS_POWER_DEEP_SLEEP is enabled, spi_qmsi_ss will
keep entering deep sleep because it needs to wait until the
current transfer completes, which blocks the current thread.
The system keeps entering deep sleep again and again and the
transfer will never complete.
Add device_busy_set() to spi_qmsi_ss driver to indicate that
the device is busy and block the system from entering deep
sleep during transaction.
Jira: ZEP-1488
Change-Id: I5a4456933249def93eaa529b30b99d730af74482
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
When CONFIG_SYS_POWER_DEEP_SLEEP is enabled, i2c_qmsi_ss will
keep entering deep sleep because it needs to wait until the
current transfer completes, which blocks the current thread.
The system keeps entering deep sleep again and again and the
transfer will never complete.
Add device_busy_set() to i2c_qmsi_ss driver to indicate that
the device is busy and block the system from entering deep
sleep during transaction.
Jira: ZEP-1487
Change-Id: Ia681d242349bce5a9867e54df4e65dba09005930
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
Enable arc to access the i2c controller on I/O fabric.
There are two i2c controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the i2c controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add i2c_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1189
Change-Id: I317da6038c50e0c8bd16f446182c1f8bdf6d3ba2
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Enable arc to access the spi controller on I/O fabric.
There are two spi controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the spi controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add spi_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1190
Change-Id: I40a5d423d4b7986a897834d1a3831938005eda6f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Use new kernel header file and k_sleep from unified
kernel instead of nano timer.
Change-Id: I1c98c07f880382eaa87f6e0c45967a4b8b6bfd7d
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
From code inspection, the driver always took timeouts in milliseconds.
The only sub-ms wait uses k_busy_wait(), which has microseconds
granularity, but its granularity does not depend on the system clock
tick rate.
Change-Id: If48363fd1fbeeb8e5ff0f0f2ca86e671d63bc571
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
It receives a timeout in ms, but was still converting it to ticks, while
the unified kernel API takes a value in ms.
Change-Id: I8ff7f44090716385764fe4b2a087043a2e0d70af
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Adds optional support for tap and double tap sensor triggers to the
fxos8700 driver using the pulse detection hardware function.
Default configuration values were taken from NXP AN4072, section 6.3.
http://cache.nxp.com/assets/documents/data/en/application-notes/AN4072.pdf
Change-Id: Ia95091628a853eb956f6fd1df099a9e6e101b707
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The GPIO_INT_LEVEL and GPIO_INT_ACTIVE_LOW values are zero so the
statements are never executed then is better use the bit complement
masks
This issue was reported by Coverity
Coverity-CID: 157586
Change-Id: Ic8b20660a991dd3d0c71248f84c917e5ce5c3c7c
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Remove the existing code that iterates over k_sem_give() and setup the
initial counter directly, take the opportunity to set the maximum count.
Change-Id: Ib91ea263567ff761e4953c142a22a56658efe293
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The shell_cmd structure has three parameters and only two were
initialized. So, this commit initializes the remaining parameter
and also adds the ARG_UNUSED macro to avoid compiler warnings.
Change-Id: I667a4e9839ec5acd526df0bb465beb2062518315
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Remove the unused argument and comparing int to unsigned int
compiler warnings.
Change-Id: Iad79ec2ef8206b2494875a93551a0f47e234ff8d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Use the right data-type to avoid compiler warnings.
Change-Id: I3e807482c5636f37ef1288689450dbe3c9c04dcf
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This patch adds the ARG_UNUSED macros to some function
arguments to avoid compiler warnings.
Change-Id: I628aea55d98cf8519c046ae5835e95cfa70a973f
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
To support interrupt-based GPIO callbacks in the nRF5x series one needs
to use the GPIOTE module, which has a series of channels that can be
programmed to trigger interrupts on level changes.
This commit adds basic support for the GPIOTE module within the nRF5x
GPIO driver, as well as callback support in order for basic buttons and
switches to work.
Change-Id: I9ae600f894372ad42b09a18cc38a90fc29abb0df
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
To make way for the upcoming blinky and GPIO support for nRF5x-based
boards, this change addresses the hardcoded dependencies in Kconfig
default configurations of the different boards, moving the common option
defaults to the SoC default configuration itself.
Change-Id: I8db0750311ad5a12b76237b39438376f20f6f496
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/basic/blinky
- samples/basic/disco
- samples/basic/button
All 4 GPIO ports are supported.
Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The new Nordic MDK redefines certain UART signal names for backwards
compatibility with the new nRF52840 IC.
This patch addresses the potential name conflict between the redefined
signals and the existing variable names defined in the UART driver.
JIRA: ZEP-1418
Change-Id: I559d9335d2eeaa0a88d3f261b70508a1c98b989d
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
rename NANOKERNEL_TICKLESS_IDLE_SUPPORTED to
TICKLESS_IDLE_SUPPORTED and remove nanokernel occurances in Kconfig
files.
Make TICKLESS_IDLE depend on hardware that supports it.
Change-Id: I6a2e4fb0f7cf4b45475b48e71823ea089ee98759
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
PRINTK was conflicting, reanme to DBG.
Jira: ZEP-953
Change-Id: If5d6ef385c5ed223f6f7eae9bde887ae4a1b946a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
That module is not used anymore: it was introduced pre-Zephyr to add
some kind of awareness when debugging ARM Cortex-M3 code with GDB but
was never really used by anyone. It has bitrotted, and with the recent
move of the tTCS and tNANO data structures to common _kernel and
k_thread, it does not even compile anymore.
Jira: ZEP-1284, ZEP-951
Change-Id: Ic9afed00f4229324fe5d2aa97dc6f1c935953244
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The ethernet controller being a freescale one, let's use its OUI. Then
only 3 bytes are needed for generating the rest of the MAC address.
Also, generating the MAC address in the right order.
Change-Id: Id3346ef44f8c24edc2e23dee6ac0581ac58cf4ff
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Left over from old IP stack it seems.
Change-Id: Ic7ce731b8661294125fa0e0e058570aeff7b97cf
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such stack size might vary if debug is enabled or not and depending also
on other factors. Let's do the same for priority as well, putting it to
high prio as default (15 is way too low level).
Change-Id: I16afab33895085bacdef087fe70adeb1ae3ca2ab
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
ll_len means link layer length, but it's misleading here as ll_len is
the whole net buffer length: reserved ll length + payload length.
Change-Id: If7ec0fc950245d370fa0f82ae1050b05c11c7b90
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
ETHERNET is a left-over from old and now unavailable IP stack.
Change-Id: I488d9ffcfb1fe3589b522dc2d620873daeb892c8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Note: This driver need to be ported to new native IP stack in order to
be available again.
Change-Id: I7825c8679e66f8a1d44d75c9d53e9da207b743af
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Johan Hedberg