Commit Graph

12 Commits

Author SHA1 Message Date
Andrew Boie a2b324035c xtensa: move byte-order macros out of arch.h
These are macros that are expected to be defined at all times by
the compiler. We need them at the very beginning of kernel.h for
the k_thread definition, before it's possible to include arch.h.

Make a special toolchain header for XCC compiler and place these
defines in there. Otherwise inherit all the other GCC defines.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-11 12:47:23 -04:00
Andrew Boie cdb94d6425 kernel: add k_panic() and k_oops() APIs
Unlike assertions, these APIs are active at all times. The kernel will
treat these errors in the same way as fatal CPU exceptions. Ultimately,
the policy of what to do with these errors is implemented in
_SysFatalErrorHandler.

If the archtecture supports it, a real CPU exception can be triggered
which will provide a complete register dump and PC value when the
problem occurs. This will provide more helpful information than a fake
exception stack frame (_default_esf) passed to the arch-specific exception
handling code.

Issue: ZEP-843
Change-Id: I8f136905c05bb84772e1c5ed53b8e920d24eb6fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-04-22 10:31:49 -04:00
Kumar Gala cc334c7273 Convert remaining code to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 11:38:23 -05:00
Kumar Gala 789081673f Introduce new sized integer typedefs
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t.  This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.

We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.

We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.

Jira: ZEP-2051

Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-20 16:07:08 +00:00
Max Filippov ac430f9595 xtensa: conditionally define endianness macros
__BYTE_ORDER__, __ORDER_BIG_ENDIAN__ and __ORDER_LITTLE_ENDIAN__ are not
defined when building with xcc, but are defined when building with gcc.
Define them conditionally.

Change-Id: Ib205ffee28360aa240d61731b7a3d6f45401b4c1
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-04-13 20:33:27 +00:00
Andrew Boie e08d07c97d kernel: add flexibility to k_cycle_get_32() definition
Some arches may want to define this as an inline function, or
define in core arch code instead of timer driver code.
Unfortunately, this means we need to remove from the footprint
tests, but this is not typically a large function.

Issue: ZEP-1546
Change-Id: Ic0d7a33507da855995838f4703d872cd613a2ca2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-16 19:27:59 +00:00
Mazen NEIFER 0cfeb626c0 Xtensa port: Fixed scheduling bug caused to missing Endianess related macros.
XCC does neither define __BYTE_ORDER__ nor __ORDER_LITTLE/BIG_ENDIAN__ macros.
This resulted in field preempt of thread.base not correctly built from other
union fields prio and sched_locked, which caused wrong scheduling.

Change-Id: I8566ef4a5cf555906c012c4adc488f9afb26c053
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 11:39:02 -08:00
Andrew Boie 9249f876a9 xtensa: cleanup fatal error handling
1) Fatal errors now all go through _SysFatalErrorHandler. When the
simulator is used, only the death of 'essential' threads will result
in the simulator exiting; some test cases that test exceptions may
actually expect a thread to terminate abnormally.

2) The human readability of the exception errors is improved.

Change-Id: I77f57ea0eae15b0c55237681b959cd21e3fe8c1c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 11:39:02 -08:00
Mazen NEIFER aacfd63331 Xtensa port: Removed duplicate file and renamed to sys_io.h as other platforms.
Change-Id: I293bfa9ff8c5e641c727612c56968cec901dbfec
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Andrew Boie 73691609b9 xtensa: fix find_msb_set() and find_lsb_set()
find_msb_set logic was wrong. find_lsb_set() is now an inline function.

Change-Id: I2c19540907723589298b2f6af2ce1d68704bf1d7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 08:04:27 -08:00
Andrew Boie aa3ab35c88 xtensa: fixup license identifiers
Master branch changed requirements for license headers while this
branch has been in development.

Change-Id: I9bce16ff275057a4bb664019628fc9b6de7aef7c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER f7538f0005 Xtensa port: Added support in arch/cpu.h for Xtensa cores.
Change-Id: If4a053f6164fd2fa30f148e6e907f662cda50722
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00