This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Enable the openamp sample for RT1160EVK. CM4 core has a custom DTS
overlay to use LPUART2 for console information, and use a secondary GPT
timer for the system tick.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable the openamp sample for RT1170EVK. CM4 core has a custom DTS
overlay to use LPUART2 for console information, and use a secondary GPT
timer for the system tick.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add lpc54114 configuration settings to enable booting second core with
sysbuild, and LMA address adjustment
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LPC55s69 requires the second core to output a hex build to ensure the
image is flashed to the correct location, and uses the
CONFIG_SECOND_CORE_MCUX symbol in each core's build to indicate the build
targets a dual core config
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Updates the location of the shared memory buffer to account for
memory map chains with `mps2_an521_remote`.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
Now that IPM drivers are enabled based on devicetree we can
remove any cases of them getting enabled by Kconfig, *defconfig*,
and *.conf files.
We need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Remove stale references to v2m_musica in the ipc samples as the board
support for v2m_musca has been removed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Its possible to rename the executable we build via the Kconfig symbol
CONFIG_KERNEL_BIN_NAME. So we really should use ${KERNEL_ELF_NAME},
${KERNEL_BIN_NAME} and ${KERNEL_HEX_NAME} variables instead of hardcoded
zephyr.elf, zephyr.bin, and zephyr.elf.
This fixes an build issue with
tests/misc/test_build/buildsystem.kconfig.utf8_in_values on
up_squared_adsp and lpcxpresso11u68 platforms.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Carlo Caione