Commit Graph

14 Commits

Author SHA1 Message Date
Daniel DeGrasse 8e07e21424 drivers: clock_control: convert lpc11u6x syscon driver to pinctrl
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 81c209dc2d drivers: gpio_lpc11u6x: use pio nodes to configure pin mux for gpio
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse f5b0c4f0d5 dts: lpc11u6x: update lpc dtsi file to include pin control nodes
update lpc11u6x dtsi file to include required DTS nodes to support LPC
pin control

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Gerard Marull-Paretas 0d85931315 dts: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all dts code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:54:54 +02:00
Carlo Caione 18ffcdcf74 linker: Introduce zephyr,memory-region compatible
Introduce a new "zephyr,memory-region" compatible to be used when a new
memory region must be created in the linker script from the devicetree
nodes using the compatible.

Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new
LINKER_DT_REGIONS macro to cycle through all the compatible regions.

In the same PR modify the DTS files and the linker scripts.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-02-21 22:02:04 -05:00
Jordan Yates dcce5b1a74 dts: linker region properties
Add `zephyr,linker-region` properties to all nodes sram1, sram2, sram3,
sram4, sdram1, sdram2, backup_sram, ti_ccfg, dtcm and itcm.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-12-09 16:23:03 +01:00
Maxime Bittan adb5dd920b dts: arm: Add I2C nodes for LPC11U6X soc series
This commit adds the device tree nodes and bindings for the I2C
controllers of the LPC11U6X MCUs

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot 75a2f3e484 dts: lpc11u6x: add node and binding for on-chip EEPROM
This patch adds the DT nodes and binding for the on-chip EEPROM found
on the LPC11U6x MCUs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan 5675136eb1 dts: arm: Add UART node and binding for LPC11U6X soc series
This commit adds the UART nodes in the LPC11U6X device tree,
as well as its binding.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot 18e4e5c1e2 dts: lpc11u6x: add GPIO node and binding
This patch adds the DT nodes and binding for the GPIO registers found
on the LPC11U6x MCUs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan ed4511ea8c drivers: clock_control: lpc11u6x: Add support for clock controller
This commit adds basic support for the clock controller used in
lpc11u6x MCUs.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan 1724bf49be dts: arm: nxp: Add node and bindings for lpc11u6x clock controller
This commit adds a bindings for the clock controller used in lpc11u6x
MCUs. It also adds a clock-controller node for the lpc11u6x soc series.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot 6eb7841bf3 dts: lpc11u6x: add pinmux node and binding
This patch adds the DT nodes and binding for the pinmux registers,
aka IOCON (I/O control), found on the LPC11U6x MCUs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan 9931eca5f9 soc: arm: Add basic support for LPC11U6X series
This commit adds basic support for the NXP lpc11u6x soc series.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00