Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This makes the board selection dependent on SoC selection. For example,
select Atmel SAM3 will only allow "Arduino Due" as board selection.
This disallows incompatible SoC/board combination, like K64F with
Arduino Due.
JIRA: ZEP-106
Change-Id: I675961cf33db5a0058fc68f14c8f16978f9c6b95
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This board is now part of qemu_x86 and shares the same file except
the configuration which makes it build with IAMCU.
JIRA: ZEP-103
Change-Id: I9a9911d013b493240c089ce71e9f95687dcc02a3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
CONFIG_HPET_TIMER_LEVEL_LOW and CONFIG_HPET_TIMER_RISING_EDGE are
selected from same choice option so cannot be both selected.
Since HPET_TIMER_FALLING_EDGE is the default only options overriding
this were left in defconfig files.
Fix following:
Merging prj_x86.conf
.config:10:warning: override: HPET_TIMER_RISING_EDGE changes choice
state
Change-Id: I5c88d2c0ae309afa11d9fae116235a8a424a2408
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
No need for the same SoC configuration with different names. Use IA32
as the "SoC" for qemu_x86 "boards".
Change-Id: Iee00538701c5ece14d0c3df637b0aaa54790f0e2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit also renames boards and makes naming consistent between
board name and defconfig files.
quark_d2000_reference -> quark_d2000_crb
quark_se_test_sss -> quark_se_sss_ctb
quark_se_test -> quark_se_ctb
Change-Id: Ibe6a5102edb987fe1d6ce32c8c392a87d45d6951
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Define boards based on platforms/SoCs and define them under boards/.
Also unify the naming of all platform, SoC and board files and use
platform.h for platforms and board.h for boards.
Change-Id: Icfeb96479ab5800aca98c80a79bdc3cecd645314
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
First step for adding the new board layer. Create configurations for the
various boards we support on x86 under boards with the new Kconfig variables
defining them.
The board selection is optional, that means you will be able to run
make menuconfig
and create your own .config and select any SoC.
Change-Id: If08e88e9675d13f0f0501ef6750b9424b15f5dc8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>