zephyr

Commit Graph

Author	SHA1	Message	Date
Kumar Gala	da7ac50683	gpio: sifive: Add device tree support for GPIO generation Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin generation based on device tree. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	2018-10-05 13:21:49 -05:00
Nathaniel Graff	218d7a0aa9	riscv: Rename the FE310 SoC to Sifive Freedom FE310 is the name of one SoC out of a range of products in the SiFive Freedom line. The FE310 SoC port in Zephyr is compatible with all of these products, so rename the SoC to SiFive Freedom Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>	2018-08-16 06:23:01 -07:00

Author

SHA1

Message

Date

Kumar Gala

da7ac50683

gpio: sifive: Add device tree support for GPIO generation

Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin
generation based on device tree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

2018-10-05 13:21:49 -05:00

Nathaniel Graff

218d7a0aa9

riscv: Rename the FE310 SoC to Sifive Freedom

FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>

2018-08-16 06:23:01 -07:00

2 Commits