Commit Graph

59 Commits

Author SHA1 Message Date
Piotr Zięcik 7a49356c77 power: Fix naming of Kconfig options controlling low power states
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-02-12 07:46:32 -05:00
Ioannis Glaropoulos ce4b3728ac soc: arm: stm32: select double-precision FP in STM32F769XI
SoC family STM32F769XI supports both double and single precision
floating-point unit. This commit enables double-precision by
default in this SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-08 14:09:18 -06:00
Erwan Gouriou d2e305491f soc: stm32: Convert CONFIG_RTC leftover to DT_
Convert CONFIG_RTC_0_IRQ_PRI to DT_ namespace.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou 3074e393db drivers/counter: stm32 rtc: Use dts to get RTC clock information
RTC clock information should be provided by dts files

Fixes #10451

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou 458226e1f7 drivers/counter: stm32: Provide STM32 RTC driver using counter API
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)

Fixes #11373

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Erwan Gouriou 7ae381a808 drivers/watchdog: stm32: move driver to dts based configuration
STM32 watchdog driver is now configured from device tree settings.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-01 19:16:59 -05:00
Erwan Gouriou 1a05f2fae3 soc: stm32: Extended watchdog support to all series
STM32F2, STM32F7 and STM32L0 were missing wtachdog API support.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-01 19:16:59 -05:00
Erwan Gouriou a985e03349 drivers/interrupt_controller: stm32: Use LL API
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-31 03:18:36 -06:00
Georgij Cernysiov 3b77737208 soc: st: add STM32L452XC
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.

Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-01-23 03:19:15 -06:00
Erwan Gouriou e25d6a65ac drivers/pinmux: stm32: Clean up after gpio driver factorization
Clean up a left over from GPIO driver factorization.
Definition of GPIO_REG_SIZE and GPIO_PORTS_BASE do not need anymore
to be spread accross SoCs.
Put these definitions directly in STM32 pinmux driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-16 08:36:09 -06:00
Song Qiang 2fb616efbe soc: arm: st_stm32: Using LL library to implement gpio functions
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Song Qiang 9612f9d840 soc: arm: st_stm32: Cleanup gpio function code.
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.

Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-01-10 13:09:19 -06:00
Erwan Gouriou f5d48240e9 drivers/gpio: stm32l4: PortG[15:2] requires dedicated VDDio2
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-09 08:05:24 -06:00
Flavio Ceolin 359adfc959 soc: arm: Make statements evaluate boolean expressions
MISRA-C requires that the if statement has essentially Boolean type.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-01-07 08:52:07 -05:00
Erwan Gouriou 7f4eda501a dts: stm32f1: add uart5
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.

Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-01-04 10:07:54 -06:00
Loic Poulain 85b8a6b84b clock_control: stm32: Add support for MSI PLL MODE
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-01-02 09:33:21 -05:00
AJ Palmer 2f04dc69c0 boards: arm: nucleo_f756zg: Created new board and soc definition
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).

Added basic documentation and some soc definitions for the
stm32 f756XX soc.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-17 11:35:27 -06:00
Aurelien Jarno 6752b5df3f drivers: flash: add driver for STM32F7x series
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-12-17 08:15:59 -06:00
AJ Palmer bd8f15f555 stm32: dts: f7: added i2c4 node
Added i2c4 node to stm32f746.dtsi for stm32f74+ socs.
Added device tree fixup for i2c4.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-14 07:22:51 -06:00
Manivannan Sadhasivam f8ac865693 arm: stm32f4: Add UART4 pinmux definitions
Add missing UART4 pinmux definitions for STM32F4 series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-12-13 08:07:28 -06:00
Erwan Gouriou 3c009a7f2f drivers/pwm: stm32: Use device tree for clocks and base address config
Use device tree generated #define's to configure STM PWM devices

Fixes #10449

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-04 09:07:28 -06:00
Erwan Gouriou 121d68f379 drivers/spi: stm32: Use device tree for device clock configuration
Use DT generated symbols to configure clock bus/bits of STM32
SPI devices.

Fixes #10447

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-21 12:28:58 -05:00
Kumar Gala 6d83738e33 dts: spi: cleanup CONFIG_SPI_x_IRQ_PRI
All of the cases of CONFIG_SPI_x_IRQ_PRI should be DT_SPI_x_IRQ_PRI.
So go ahead and fix them up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-21 12:27:16 -05:00
Ioannis Glaropoulos 8204ecbead arch: arm: mpu: declare and define arm_mpu_config as const
Declare and define arm_mpu_config and arm_mpu_regions
structs as const, as they are not modified in run-time.

Fixes #10320

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-11-21 09:44:21 -05:00
Kiril Zyapkov 23cb7dd660 soc: st: add STM32L471xG
This commit adds support for STM32L471xG. Since STM32L475 only adds
USB, stm32l475.dtsi now includes stm32l471.dtsi

Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
2018-11-20 14:09:04 -06:00
Kumar Gala 1634cf2248 drivers/spi: Always selecet HAS_DTS_SPI once SPI is enabled
All drivers require DTS for their primary SPI settings.

Removing SPI_[0-9]_NAME config option added some more samples changes.
Usage of these options there was anyway not relevant.

Fixes #11064

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-16 14:02:00 -05:00
Ulf Magnusson 4638652214 Kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
This can help find unused symbols. Those end up without a type if
'default' is used instead of 'def_bool', which generates a warning.

Search for "Kconfig.defconfig" in
https://docs.zephyrproject.org/latest/application/kconfig-tips.html for
a longer explanation.

Keep the 'def_bool' for the following symbols, which seem to be
deliberately defined only in Kconfig.defconfig files:

 - ALTERA_AVALON_I2C
 - ALTERA_AVALON_MSGDMA
 - ALTERA_AVALON_PIO
 - ALTERA_AVALON_QSPI
 - ALTERA_AVALON_SYSID
 - CLOCK_CONTROL_IMX_CCM
 - CPU_EM4_DMIPS
 - CPU_EM4_FPUDA
 - CPU_EM4_FPUS
 - FP_FPU_DA
 - I2C_GECKO

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-11-13 16:04:01 -05:00
Andrzej Głąbek 20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Andrzej Głąbek f39ba7230d dts_fixups: Update labels generated from DTS with DT_ prefix
All labels containing "_<8-hex-digits>_" or "16550_<3or6-hex-digits>_"
in their names, assumed to be generated by the extracting script,
are updated with the DT_ prefix, to reflect the recent changes made
to the script.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Aurelien Jarno 1b1f832197 arch: arm: stm32f7: Kconfig: select CPU_HAS_ARM_MPU
Now that Cortex-M7 cache issues have been fixed in commits 828ae6b8 and
13972693, it is possible to safely enable the MPU on the STM32F7 SoC
series.

Note that the ITCM area is not mapped into an MPU region. This should
not be an issue for now, as Zephyr does not provide yet a way to
populate and use this area.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-11-13 08:58:29 -05:00
Pavel Kral 86a4967365 dts: stm32f103: add missing dts binding for port G
STM32F103 micros starting from 64-pin (xE) packages upward have
available port G. This patch defines a dts binding for them.

Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
2018-11-12 08:26:49 -05:00
Erwan Gouriou 0d81496fc5 soc/st/stm32f7: Fix typo in stm32f7 fixup file
Fix address field STM32 USART8 NAME macro

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-12 08:17:28 -05:00
Erwan Gouriou d76a5592e4 drivers/serial: stm32: Get clocks information from device tree
Provide CONFIG macros for clocks bits and bus properties in fixup
files and use them to simplify logic in uart devices instanciation
code

Fixes #10448

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-12 08:17:28 -05:00
Martin Bertsche 9892f40204 gpio: stm32 use dts extracted information to populate gpio instances.
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.

The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.

The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.

Manual tests were executed on:
	- NUCLEO-F103RB
	- STM32F429I-DISCO
	- STM32F746G-DISCO
	- NUCLEO-F767ZI

Manual tests consisted of blinky on different GPIOs and pins on each
board.

sanitycheck was executed for all STM32 based boards

Fixes: #10629

Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
2018-11-09 04:49:59 -06:00
Benoit Leforestier 270ec15482 board: Add support of STM32F143xG SOC
The only difference between the F413xH and F413xG is flash memory size.
STMF413xH: 1536 Kbytes
STMF413xG: 1024 Kbytes

Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
2018-11-08 07:05:04 -06:00
Erwan Gouriou 9df3a1f67f drivers/i2c: stm32: get clock bits/bus from dts files
Get STM32 I2C clocks bus and bits information from
device tree files.

Fixes #10435

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-06 16:14:13 -05:00
Christian Taedcke 743938b450 dts/arm/st_stm32: Add SPI nodes to STM32 F7 series
This patch adds SPI nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
Christian Taedcke 5575594ce9 drivers: spi_ll_stm32: Enable SPI driver for F7 family
Enables SPI driver for STM32F7 SoCs

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
Christian Taedcke 2e06fd50fd drivers/rtc: Enable RTC driver for STM32F7 series
Enable RTC driver for STM32F7 series.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-23 09:19:15 +01:00
Galen Seitz 498fa532c9 soc: arm: st_stm32: stm32f3: Add support for STM32F302x8
Add Kconfig support for STM32F302x8 SoC.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Galen Seitz d509100e11 soc: arm: st_stm32: stm32f3: Add defines for I2C3
Add definitions for I2C3 which is present in some stm32f3 devices.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Galen Seitz da891b7ab2 soc: arm: st_stm32: stm32f3: Add defines for USART3
Add definitions for USART3 which is present in some stm32f3
devices.

Signed-off-by: Galen Seitz <galens@seitzassoc.com>
2018-10-16 22:52:07 -04:00
Jun Li 08d5c5ef1d soc: stm32f4: enable dma options for soc
Enable "CONFIG_DMA_STM32F4X" when "CONFIG_DMA" is enabled.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2018-10-11 12:58:30 -05:00
Armando Visconti 31f2e81e10 soc/arm/stm32f4xx: Add I2S defines to dts.fixup
For the stm32f4xx family the SPI and I2S are sharing same
controller, so we can reuse same definitions.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Armando Visconti 411dc003ee arch: arm: soc: stm32f4xx: Add LL include file also for I2S case
stm32f4xx_ll_spi.h include file is shared between I2S and SPI
(controller is same). So we need to include it even when I2S_STM32
is enabled.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Yannis Damigos 84737529d3 dts: st: f2/l4: Add missing maximum-speed property
Add missing maximum-speed property to usb nodes
for F2 and L4 series.

Fixes: #10472

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-10 12:27:55 -05:00
Yannis Damigos 1c4f22edaf arch: stm32f4/f7/l4: Add usb maximum speed defines to dts fixup
Add CONFIG_USB_MAXIMUM_SPEED defines to dts fixup files.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-09 12:59:34 -04:00
Pushpal Sidhu 3ed0375c8d arch: arm: mpu: add support for 640k SRAM
The STM32L4+ parts have 640k of SRAM.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Pushpal Sidhu f1d78d8f38 arm: st: add stm32l4r5xx support
New parts from ST. See http://www.st.com/en/microcontrollers/stm32l4r5-s5.html
for more details.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Sebastian Bøe 8eb734cd82 DT: Rename from dts.fixup to dts_fixup.h
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.

To this end we rename the dts.fixup files to the correct file
extension '.h'.

This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-08 11:38:56 -04:00