Work around the fact that llvm objcopy does not support --gap-fill right
now. This should be done on the toolchain level at some point, it is
currently not possible however.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These were removed in commit 6b58e2c0a3
but mistakenly reintroduced in
commit 51c34bb609
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add a new Kconfig CONFIG_BUILD_OUTPUT_EFI and select that for boards
that want to generate an EFI application.
Make qemu_x86_64 also generate an EFI file, however do not enable this
by default yet.
Goal is to boot qemu using EFI to be able to test this path in the
future.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We've already enabled full RAM mapping if ACPI is enabled, also
set a large 3GB address space size, these systems are not RAM-
constrained (they are PC platforms) and they have large MMIO
config spaces for PCIe.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With SDK 0.12.2 we have support to generation EFI binaries in binutils
which is needed by the zefi.py script. Now that is there we can utilize
the SDK objcopy instead of assuming the host objcopy can do this (which
would only be the case on x86 linux host systems).
Fixes#27047
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
These are all PC systems which have large amounts of memory
which needs to be mapped at runtime (most are 2GB).
Increase the address space size accordingly, adding an extra
8MB for mappings.
The ACRN target has 8MB, give it 16MB of VM.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
When zefi.py was changed to pass compiler and objcopy the flag to
objcopy for the EFI target was dropped. This is because the current
SDK (0.12.1) doesn't support that target type for objcopy. However,
target is necessary for the images to be created correctly and boot.
Switch back to use the host objcopy as a stop gap fix, until the SDK
can support target for EFI.
Fixes: #31517
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Currently, zefi.py takes host GCC OBJCOPY as
default. Fixing the script to use CMAKE_C_COMPILER
and CMAKE_OBJCOPY.
Fixes: #27047
Signed-off-by: Spoorthy Priya Yerabolu <spoorthy.priya.yerabolu@intel.com>
This reverts commit 7492841dd1.
Enabling CONFIG_INTEL_VTD_ICTL on UP Squared board results
in tests and apps hanging. So revert this for now.
Relates to #30574
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
These are set such that we have enough pages in the pool
for typical driver mappings and to instantiate two more
memory domains, which is what our tests require.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
* Rename DT_SRAM_SIZE to DT_DRAM_SIZE since that is more correct
* Remove mmio-sram compatible since that is not correct for DRAM.
* Rename node label from sram0 to dram0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This makes the up_squared board default to x86_64.
This also adds a new board, up_squared_32, for when 32-bit
is desired.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Given that the UP Squared has relatively large memory, the default
number of pages allocated for page tables are not enough, and
resulting in asserting in the page table initialization code.
So change the number of pages to a large number to accomodate
various applications.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The APIC timer is not supported e.g. with SMP (which will be enabled
by default soon as well) so the sensible choice is to default to HPET.
Also, the default makes more sense to be on the SoC side, so move it
there from the board defaults.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The Kconfig I2C_[0-9] sybmols don't have any meaning for the majority of
SoCs. The drivers doesn't utilize them and no sample or test code does
either so we can remove setting them in board Kconfig.defconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.
CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.
Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:
1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
turn the CONFIG_<arch> symbols into invisible
(promptless/nonconfigurable) symbols instead.
Getting rid of the choice allows the symbols to be 'select'ed (choice
symbols don't support 'select').
2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
This makes sense since you know the architecture if you know the SoC.
Put the select on the SOC_* symbol instead for boards that don't have
a SOC_SERIES_*.
3. Remove all assignments to CONFIG_<arch> symbols. The assignments
would generate errors now, since the symbols are promptless.
The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.
See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.
This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The CONFIG_UP_SQUARED_{ATOM,CELERON,PENTIUM} symbols are unused after
commit c5e582038c ("boards/x86/up_squared: default to new local APIC
timer").
Since these symbols are the only thing in boards/x86/up_squared/Kconfig,
which is osource'd in in board/Kconfig, just remove the entire file.
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In order to avoid a warning from Sphinx complaining that the
supported_features.rst file is not included in any ToC, rename it to
.txt so that Sphinx understands that this is only a snippet to be
included in other files.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Use this short header style in all Kconfig files:
# <description>
# <copyright>
# <license>
...
Also change all <description>s from
# Kconfig[.extension] - Foo-related options
to just
# Foo-related options
It's clear enough that it's about Kconfig.
The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)
git ls-files '*Kconfig*' | \
xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).
Go for the most common style:
- Indent properties with a single tab, including for choices.
Properties on choices work exactly the same syntactically as
properties on symbols, so not sure how the no-indentation thing
happened.
- Indent help texts with a tab followed by two spaces
- Put a space between 'config' and the symbol name, not a tab. This
also helps when grepping for definitions.
- Do '# A comment' instead of '#A comment'
I tweaked Kconfiglib a bit to find most of the stuff.
Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
From the Jailhouse days, this has been a function call. That's silly.
We now inline the EOI in the ISR when in x2APIC mode. Also clean up
z_irq_controller_eoi(), so it now uses the inline macros.
Also, we now enable x2APIC on up_squared by default.
Fixes: #17133
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
XIP support in x86 was something of a mess. This
patch does the following:
- Generic ia32 SOC no longer defines a "flash" region
as generic X86 devices don't have a microcontroller-
like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
The board definition must provide a flash region definition
that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
removed.
- qemu_x86 has a fake flash region added, immediately after system
RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
XIP by default, plus an additional test to exercise XIP on
qemu_x86 (which supports it but has XIP switched off by default)
The overall effect of this patch is to:
- Remove XIP configuration for SOC/boards where it does not make
any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
it off by default for other tests, to ensure it doesn't bit-rot
and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.
Fixes: #18956
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The documentation for the GPMRB incorrectly made reference to the
up_squared board in its high-speed UART configuration section. We
consolidate the related documentation for all boards based on the
Apollo Lake SoC and adjust the language to be more generic.
Fixes: #18808
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Instead of having a mix of west and CMake/ninja instructions for
building and flashing, document it using only west. This will help
clarify that west is the default build tool in Zephyr and should also
reduce confusion over what tool to use.
Note that the biggest change is changing the default in
doc/extensions/zephyr/application.py for :tool:, from all to west.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This is the "flagship" platform for the new local APIC timer driver.
The opportunity is taken clean up the configuration as well, so the
choice of local APIC vs HPET timer requires changing only one Kconfig.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Fix misspellings and doc issues missed during regular reviews (including
some files without a trailing newline)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
While enabling specific I2C ports does indeed belong at the board
level Kconfig, the selection of driver (I2C_DW) is an SoC-level
choice, so it is moved accordingly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Which UARTs are broken out from the SoC on a particular board is
board-specific; don't enable UARTs blindly in the SoC Kconfig.
Also, the default UART options are specified in the driver Kconfig, so
the same defaults specified in the SoC Kconfig are redundant. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Since Kconfig is responsible for enabling/disabling devices at build,
the devices in dt are defaulted to status="ok" to keep the output in
generated_dts_board.conf the same across configurations and simplify
the board-level dts files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The UART references in dts_fixup.h are actually SoC-specific, not
board-specific, so they are moved. Since this leaves the board fixups
empty, the file is removed.
The SoC fixups are expanded to include the additional two ports that
are present on some revisions of the Apollo Lake.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
I2C support has been added back into the up_squared, leveraging the
new PCIe support in the DesignWare I2C driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The SBL configuration no longer differs in any detail (except its name)
from the "standard" UpSquared configuration, so it is removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This needs to be pushed down to the SoC level, as it's an Apollo Lake
feature, not a feature of the UpSquared. Remove the Apollo Lake
references to the PCI devices because these will not be used when I2C
support is restored.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This option is no longer used in the dts_fixup.h file since there
are no SBL-specific fixups.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Johan Hedberg