Commit Graph

181 Commits

Author SHA1 Message Date
Adam Podogrocki 726d11a5a2 pinmux/stm32: extend pinmux driver functionality to support STM32F3X series MCUs
Change-Id: Ifc4c93e03b6593f1b6c7e664fdf719f9344fe1ee
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Adam Podogrocki f23492a059 gpio/stm32: provide GPIO driver implementation for STM32F3X family
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.

Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Adam Podogrocki 61cc74c425 flash/stm32: flash driver for STM32F3x series microcontrollers
Change-Id: I0b41a50507a09a513a67d13374323d831a0ec86a
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Adam Podogrocki c514f671c7 clock/stm32: add STM32F3X reset and clock control
Change-Id: Ie5f3ffec0b3aaf15f9d9f8063d2bab6be5aebb6e
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Adam Podogrocki 42a4615973 soc/stm32: add initial support for STM32F3X series
Supported SoCs:
- STM32F303XC
- STM32F334X8
- STM32F373XC

Change-Id: I74b9561272d54e270ae1a1f602fd389d4c86539a
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-23 15:15:52 -06:00
Ricardo Salveti 6e14642c1e arm/nordic_nrf5: enable SOC_FLASH_NRF5 by default if FLASH is enabled
SOC_FLASH_NRF5 is compatible with any nrf5 device, so enable the driver
by default if CONFIG_FLASH is also enabled.

Change-Id: I6ddf7cc41bb28071f682e78661b184a8e2ee7aa9
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2017-01-23 15:15:52 -06:00
Ricardo Salveti 58460a52c9 arm: set default vector table address in prep_c when XIP
It is called before early SoC initialization, so remove the duplicated
code from other boards and just set it by default when using XIP.

This can later be used when adding bootloader support, as an
additional option could be created to move the VTOR offset to a
different address.

Change-Id: Ia1f5d9a066de61858ee287215cefdd58596b6b1c
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2017-01-23 15:15:52 -06:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Maureen Helm eb0a2f8516 k64: Remove port clock enables from the soc init
The mcux pinmux driver enables the port clocks, so the soc init no
longer needs to enable them. Also removes some soc defines that were
used only by the legacy k64 pinmux driver.

Change-Id: I63174bef4024b5a09a73f941cea0aec691c759d3
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:28 -06:00
Maureen Helm 7682a0d7ca gpio: Remove the k64 gpio driver
Now that we have a more generic mcux gpio driver that can be used across
multiple Kinetis SoCs, remove the specific k64 gpio driver.

Jira: ZEP-1394
Change-Id: I177f96a75e441b70c523e74e99f1b7a54eac6b0e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm fc012feadb k64: Change the default gpio driver to the mcux one
Stop using the specific k64 gpio driver by default and start using the
more generic mcux gpio driver instead.

Jira: ZEP-1394
Change-Id: I54ec9b62cc8790b8973efc34fa36d17da523971e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm 4184c7f82e k64: Move uart console pins to board pinmux tables
Moves the uart console pins from the k64 soc init to the frdm_k64f and
hexiwear_k64 board pinmux tables. Not having these pins in the board
pinmux tables led one to believe that no pins in PORTB were being used
on the hexiwear_k64 board, and thus the port was incorrectly disabled by
default.

Also fixes PORTB to be enabled by default if the uart console is used.

Change-Id: Ide6b7b34dfba8a75a02a8f2bf37cce843afb92f1
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Adam Podogrocki 72782f542c clock/stm32: add STM32F107 reset and clock control
Change-Id: If2280187c866c130212ea22c3d406501f37133b2
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-12 09:46:27 -06:00
Adam Podogrocki 10b350d854 soc/stm32f1: Add the new type of SoC STM32F107
This patch provides initial support for the SoC STM32F107. This SoC
belongs to the Connectivity Line devices.

Connectivity line family incorporates up to 14 communication
interfaces such as: 2 x I2C, 5 x USART, 3 x SPI, 2 x CAN, USB 2.0,
10/100 Ethernet MAC.

Change-Id: I5cb2c458bce9ec1558b4168e87a7003ad9f606a5
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-12 09:46:27 -06:00
Maureen Helm 2e6350bfe3 ksdk: mcux: Remove config HAS_KSDK
Now that all the ksdk/mcux shim drivers use the config HAS_MCUX, we can
remove the config HAS_KSDK.

Change-Id: I94b7db41efae10c9234681aeb57f94e67a33c262
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm 4183dae89b pinmux: Rename ksdk to mcux
Renames the ksdk pinmux driver to mcux.

Change-Id: I7a519318b5b580c47b6f6652a2ae763067d85033
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:27 -06:00
Maureen Helm e17adf377b flash: Rename ksdk to mcux
Renames the ksdk soc flash driver to mcux.

Change-Id: I835e36f25d8bc3e3aa6286718452528174378907
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:26 -06:00
Maureen Helm aa995f8d2f random: Rename ksdk to mcux
Renames the ksdk random generator shim driver to mcux.

Change-Id: I8bc376937fed3024c809782139a0a72c7332f89a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:26 -06:00
Maureen Helm b22bc6e69b i2c: Rename ksdk to mcux
Renames the ksdk i2c shim driver to mcux.

Change-Id: I1bcae2fa30cb698af32d6abc609d77dee42c608d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:26 -06:00
Maureen Helm 40f5de5a56 ethernet: Rename ksdk to mcux
Renames the ksdk ethernet shim driver to mcux.

Change-Id: Ief03eabe4ce39be0d0896543c1cb660ff380b439
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:26 -06:00
Maureen Helm 9f61bfce9a pinmux: Remove stale ksdk pinmux dev references
The ksdk pinmux dev driver was previously merged into the regular ksdk
pinmux driver, and the config PINMUX_DEV_KSDK was removed. Two
references were inadvertantly left behind, so remove them now.

Change-Id: I77394be5459d55a9f16e7bd2b3c9d688c4605b4f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-12 09:46:25 -06:00
Erwan Gouriou 219a1e7f0b stm32f4: Update flash to support higher sysclock frequencies
stm32f411re SoC could run at system clock above 84MHz.
This was not taken into account in __setup_flash function which configure
flash latency depending on system clock. This is now corrected.
Assert added to ease error detection.


Change-Id: I49b92256d611ef464171fb1d8812a4c4d3c27ab8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-12 09:46:25 -06:00
Gil Pitney 9bc293c827 cc3200: Use peripheral driver library functions from ROM
Previously, CC3200 drivers had two options to use the peripheral
driver library APIs:
1) Build driverlib SDK files in Zephyr, in ext/hal/ti/cc3200/*
2) Link directly with the driverlib.a, from an externally installed
   TI CC3200 SDK.

A new option is added to replace option 2), and is now the default:
3) Use the driverlib functions already provided in ROM.

This enables a savings in code size, which will depend on the
types of device drivers configured and the number of SDK
APIs actually used.

A rom_report build of the shell sample application showed
a savings of about 2kb in code space using this new config option.

Change-Id: Ie1ede6f7aacd23db20f5292e776f1dfeab5c7fe0
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-12 09:46:25 -06:00
Johan Hedberg 183e417efa arch: arm: Use smaller ISR stack size for 16k nRF51 SoCs
The 16k RAM nRF51 variants pose a challenge to get applications to fit
within the available memory. Make the default ISR stack size smaller
than the previous 2k default, but big enough to run fully functional
Bluetooth controller and host stacks.

Change-Id: Ie7c5bb21a3ba620d283e6228a2482d280f85119d
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-01-09 21:28:23 +00:00
Kumar Gala b7386c3a26 arm: nordic_nrf5: Cleanup Kconfig dependencies for timer and clocks
On the nRF5x platforms we need always need the NRF_RTC_TIMER and it
depends on the CLOCK_CONTROL_NRF5.  So enable all of these always.

Fixes issues if one tries to build nRF5x platforms w/o CONFIG_BLUETOOTH.

Change-Id: I0f9af785e785f37ec289a935ddf70ee6dec08cd4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-09 20:55:10 +00:00
Anas Nashif c1347b4730 kernel: replace all remaining nanokernel occurances
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.

Keep the legacy samples/tests as is.

Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Matthias Boesl ffa67b77c6 board: add initial support for Nucleo-64 with Soc STM32F411RE
Change-Id: I698693bccce1e9599c20e57f5d4172643ca38cc9
Signed-off-by: Matthias Boesl <matthias.boesl@gmail.com>
2016-12-20 09:15:19 -06:00
Gil Pitney 8b93aaa229 cc3200: Move UART peripheral clock enable into soc init
Previously, UART clock enable was done in pinmux init.

This is now moved into soc initialization, along with other
power related initialization routines.

Change-Id: I1f9464655ad966e9caac2d238006f12a06b202ab
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-12-20 09:14:49 -06:00
Carles Cufi 3655291d5f boards: arm: Refactor the GPIO and UART dependencies
To make way for the upcoming blinky and GPIO support for nRF5x-based
boards, this change addresses the hardcoded dependencies in Kconfig
default configurations of the different boards, moving the common option
defaults to the SoC default configuration itself.

Change-Id: I8db0750311ad5a12b76237b39438376f20f6f496
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-20 09:14:48 -06:00
Gil Pitney f18cced2c1 cc3200: Add a GPIO driver for the TI CC3200 LaunchXL
The pinmux configuration is done during board initialization.

This was validated using the following Zephyr apps:
 - samples/basic/blinky
 - samples/basic/disco
 - samples/basic/button

All 4 GPIO ports are supported.

Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-12-20 09:14:48 -06:00
Carles Cufi ce8629c92b arch: arm: Add support for the Nordic nRF52840 IC
The new Nordic nRF52840 IC is the latest member of the nRF52 family.
It supports the following features among others:

    * Cortex-M4F core at 64MHz
    * 1024KB of flash and 256KB of RAM
    * Bluetooth 5-ready and 802.15.4 compatible radio
    * USB device support
    * NFC Tag support
    * Quad-SPI
    * Hardware accelerated crypto engine

http://www.nordicsemi.com/eng/Products/nRF52840

JIRA: ZEP-1418

Change-Id: I677c787bb33d02695e057d5dced7e3455b9f6c50
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-12-20 09:14:48 -06:00
Carles Cufi c5d2c4a65d arch: arm: Refactor and cleanup nRF52 series arch code
In preparation for the upcoming nRF52840 support, this patch refactors
the nRF52 series support code to allow for future members of the IC
family to be added, while keeping everything that is common together.

JIRA: ZEP-1418

Change-Id: I4200064ca888d72ba0b8629ce94e4ea6384099ad
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-20 09:14:48 -06:00
Marcus Shawcroft 6f74a4a3dc k64f: Default the ETH_KSDK on if NET_L2_ETHERNET enabled.
The K64F board has the ENET ethernet driver.  Behavior consistently
with other driver selection logic and default the KSDK ethernet driver
on if ETHERNET drivers are enabled.

Change-Id: I2fbed7fdef22d75cf163b61b3e0530ce00d988f0
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-12-19 10:25:57 +00:00
Marcus Shawcroft a94437c03c sensor: Add nRF5 temperature driver.
Basic interrupt driven driver for the nRF5 onboard temperature sensor.

Change-Id: Id0ac303293b8e8b8285b19bcda31284ee6617105
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-12-11 11:14:05 +00:00
Maureen Helm 4a1c31a790 k64: Change the default pinmux driver to the ksdk one
Stop using the specific k64 pinmux driver by default and start using the
more generic ksdk pinmux driver instead.

Jira: ZEP-1393
Change-Id: Id65b59518c386e6ba33cfa5c4c5bd541664d2b41
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2016-12-10 21:14:12 +00:00
Erwan Gouriou 2695efa90a soc: stm32xx: add pwm pinmux support
Following pinmux update for PWM support,
update soc to support this new configuration.

Change-Id: I1126e347ab1ab6b2d830993e548de8f32fa2f8f9
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 10:31:46 -06:00
Vincenzo Frascino c4e5126519 soc_beetle: Add initial PM configuration
This patch adds the boot time Power Management configuration for Beetle
on Zephyr. In particular it defines the states of the peripherals during
sleep and deep sleep and the allowed wakeup sources.

Jira: ZEP-1300
Change-Id: Iad9c0f851771ea60d94bbe5420b7b3ee0743b77e
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong c14867069a stm32l4: add pinconf settings for I2C
Add one pin configuration for I2C1 of the STM32L4 series.

Change-Id: Id05d916f2a1126ca439aebcddd8dc9c91015f6fe
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong d4b69847a8 stm32l4: add pinconf for USARTs
Add the pin configuration of the USARTs.

Change-Id: Idf7a18b6eab95c61870ad4850c9eafb1fdcab03d
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:31:45 -06:00
Neil Armstrong 3842c60ce3 stm32l4: add clock control driver
Add the clock driver for the STM32L4 series.

Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-12-06 10:31:41 -06:00
Neil Armstrong 8833e44f6d stm32l4: add initial soc support for stm32l4
Add the initial SoC support for the STM32L4XX family. The code was
tested on STM32L476RG, but should work on any STM32L4XX currently
available.

This implementation was inspired by the stm32f1x implementation.

Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Erwan Gouriou 2fcf3435c1 serial: Provide new numbering scheme for stm32 UART
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers

Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Erwan Gouriou 575207c6ff stm32f4: Update after serial driver rework
Due to new serial driver implementation based on STM32Cube we can
remove the USARTX_ADDR defines as they aren't ended anymore

Change-Id: Ia9f9b0a2a63280c0221c789a53ff7338bda17dfb
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Erwan Gouriou 293b3e18bd stm32f1: Update after serial driver rework
Due to new serial driver implementation based on STM32Cube we can
remove the USARTX_ADDR defines as they aren't ended anymore

Change-Id: Icd5b7995429025c5b54b1a04ca6abb9649ab31c8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Erwan Gouriou 8c079e91c9 serial: Provide STM32Cube based serial driver on stm32f1, stm32f4
STM32Cube based implementation allows single driver file for
all stm32 based SoCs.
By maximizing code reuse, use of STM32Cube eases new SoCs
porting into Zephyr and provides better maintanability and
maturity.

Change-Id: Ief4b723add3dfc8b2a839683559c5a4c5d5eb837
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 09:50:11 -06:00
Flavio Santes cf09370d4e arm: Remove unused parameter warning
This patch fixes the unused parameter warning found at the
arch/arm/core/fault.c and arch/arm/soc/st_stm32/stm32f1/soc_gpio.c
files.

Change-Id: I5b3013c1514cff30f4e98feb31169fb28546c534
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
2016-12-03 14:49:09 +00:00
Marcus Shawcroft 64c69d585f Fix Kconfig formatting.
Change-Id: I5720efb9455740a95ea785b0cd205875a215b922
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-11-30 17:01:46 +00:00
Vinayak Chettimada a100ada866 drivers: timer: nRF SoC Series RTC system clock implementation
The nRF5x series SoCs do not implement systick, hence we disable
CORTEX_M_SYSTICK.
Instead, use nRF SoC Series NRF_RTC1 for system clock interfaces.
The kernel system clock interface is implemented using the low
power real time counter NRF_RTC1. NRF_RTC0 is used by the BLE
controller.

In addition, cleanup nRF5x series defconfig to be consistent.

Jira: ZEP-742
Jira: ZEP-1308
Jira: ZEP-1315

Change-id: I0f6cc1836fe0820a65f2cbb02cf5ae7e9eb92e1d
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-27 19:39:27 +00:00
Anas Nashif 92c5f91413 arm: systick: Some SoCs do not have systick
Make the systick feature optional that can be selected by the SoC.

Change-Id: I4a405640b84daecc17fc1882743d3cafb78ff861
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-27 19:39:26 +00:00
Tomasz Bursztyka 6d6c559001 arch: stm32f1: Fixing a typo
PA10 should use *_PA10_UART1_RX

Change-Id: Ifba4d301d049db1d62ea3a63d4d66f75c88a71a6
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-11-22 17:00:45 +00:00