This reverts commit 97bb67d66c.
The revised FIFO draining seems to cause failures due
to channel shift with Intel MTL platform.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The OSEL bits in ALHASCTL register are present only
in ACE1.5 version - MTL. Platforms ACE2.0 do not have
the OSEL bits. Therefore DAI_ALH_HAS_OWNERSHIP
configuration option should be set only for
particular ACE1.5 version
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
The receive FIFO needs to be drained in a different way depending when it
is done.
- before start
If the RX FIFO is in overflow state then we must read all the entries out
to empty it (it was after all full).
- before stop
The DMA might be already running to read out data. Check the FIFO level
change in one sample time which gives us the needed information to decide
to wait for another loop for the DMA burst to finish, wait for the DMA to
start it's burst (DMA request was asserted) or drain the FIFO directly.
No need to drain the RX fifo at probe time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Zephyr increments the gain until it reaches the maximum value and
then sets the registers to zero which is incorrect.
The values set in the DMIC config should be restored.
Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
Fix a shadow variable build error:
dmic_nhlt.c: In function 'dai_dmic_write_coeff':
dmic_nhlt.c:57:78: error: declaration of 'base' shadows a global
declaration [-Werror=shadow]
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Created set of new functions for configure fir coefficients with support
for packed format. This allowed to make the dai_dmic_set_config_nhlt
function simpler.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
More verbose variable pdm_idx was used instead of n. The series of
references to the array of pdm base addresses has been replaced with
a pdm_base variable.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
All fir filters have an identical set of registers so their definitions
were combined to simplify the code. From the dai_dmic_set_config_nhlt
function, a duplicate piece of code responsible for configuring fir was
separated into a new function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Created dai_dmic_start_fifo_packers function corresponding to an already
existing dai_dmic_stop_fifo_packers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The while loop in the code fragments waiting for a bit to be cleared has
been replaced with the WAIT_FOR macro call. Added a warning in the case of
timeout.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
All PDM controllers have the same set of registers. Their definitions have
been merged to simplify the code.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Moved code fragments responsible for logging and verification of the
configuration register values from the dai_dmic_set_config_nhlt function to
a separate functions. Behavior of the code verifying the correctness of
register values has been changed so that it only displays warnings.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Definitions of a configuration blob structures were separated from the main
drivers header file and moved to a dedicated file to improve code
readability. Removed unnecessary nhlt_pdm_fir_coeffs structure.
The nhlt_pdm_ctrl_cfg structure was extended with nhlt_pdm_ctrl_fir_cfg
and fir coefficients.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Refcounting is used to track ALH block usage and to
call alh_claim_ownership()/alh_release_ownership() accordingly.
This is however incorrectly done on ALH instance basis, which
means when one instance is released, ownership can be released
even though one ALH instance is still active.
Fix the logic by tracking ALH usage as a global property
which matches the alh_claim_ownership/alh_release_ownership
semantics.
Link: https://github.com/thesofproject/sof/issues/7759
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The SSP driver depends on DMA as there are references in the devicetree,
but it currently initialize before the DMA driver itself. This is
exposed by the build time priority checking
(CONFIG_CHECK_INIT_PRIORITIES=y) and shows up as:
ERROR: /soc/ssp@77a00 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77800 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77600 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
...
Bumping up the SSP priority so the initialization is in sync with the
devicetree node hirearchy.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The ifdefs in in dmic headers is getting out of control and makes
maintainence very ddifficult, especially when having to maintain out of
tree SoCs sharing the same data and information.
Keep header clean and per SoC and share some common registers in one
place instead avoiding confusion and making it easier to read and
maintain.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Since the mtl platform, the stereo bit has been removed from the
CIC_CONTROL register and now it is marked as reserved. On some platforms
(mtl and above), the configuration blob still has this bit set, causing the
dmic driver to report an error. This commit changes the behavior of the
driver to only display a warning.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The argument to the dmic irq is of type "struct device *" and dmic data
is actually part of it, thus make the cast correctly.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Moved dmic register definitions to a separate file dmic_regs.h and added
their description. Platform-dependent registers definitions are placed in
separate files. Used standard macros FIELD_PREP, FIELD_GET in operations on
registers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
For Intel cavs2.5, access from LPGPDMAC to Audio Link Hub
RX/TX registers needs to be explicitly enabled before use.
The logic follow hardware initialization done in
SOF project sof/src/platform/intel/cavs/platform.c
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
A recent commit broke the power-up sequences for other Intel
platforms.
Fixes: 1e5550d262 ("intel_adsp: ace20_lnl: ssp: Program new HW registers")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The logic to poll on CPA bit is not working on non-ACE2.0
platforms. This is causing regressions in SOF test suite with
dmic.
Fixes: 2547948544 ("intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The function dai_ssp_poll_for_register_delay() is meant to poll the
register until the value of the mask bits is equal to the "val"
argument or until poll timeout has occured. WAIT_FOR() returns the value
of the checked expression, so the check should be modified accordingly.
This should prevent the errors seen during every SSP trigger as below:
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487432 mask 4 val 4 us 125
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487496 mask 63 val 0 us 937
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch fixes i2svss field initialisation in Device Tree for LNL
platform. It fixes this bug: #482
Problem is observed only when using SSP_BLOB_VER_1_5 version.
Unfortunatelly this version is not tested in FW validation tests.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Clearing SPA bit together with OFFLEN bit causes FW hang.
This patch changes sequence to avoid that situation.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The upper ssp slot number should be retrieved from configuration
blob to support all possible settings. This patch fix this issue.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Repleace usage of shim2 device tree field with hdamlssp.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In LNL platform GPDMA and ALH is no longer used. SSP uses LINK HDA
as a DMA engine. Therefore new shim, new register definitions and new
programming flows were defined.
This patch implements new SSP programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In LNL platform GPDMA and ALH is no longer used. DMIC uses LINK HDA
as a DMA engine. Therefore new shims, new register definitions and new
programming flows were defined.
This patch implements new DMIC programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Ignore the link clock_source for non-ACE platforms instead of throwing
an error when it is set in the topology.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
With this patch DMIC device after init will be in OFF state. When power
domain will be powered-up device will switch into suspended state and
change it to active only when is used.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Since the device need to be first powered-up by the power domain, it has
more sense that device is in off state at the beginning.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
When releasing a paused stream, clearing MIC_MUTE bit is necessary.
Without unmuting there will be no input data after resume.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Clearing SOFT_RESET bit applies to ACE as well. In case of ACE,
this should be done before setting start bits for CIC and FIR.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This change produces more quickly in the stream valid
audio samples. The start fade-in ramp can be shortened to
100 ms for 48 kHz and 200 ms for 16 kHz. It was before 200 ms
and 400 ms. The updated DMIC hardware in allows to do this
change.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
Kai Vehmanen