Commit Graph

193 Commits

Author SHA1 Message Date
Dan Kalowsky d81d8bcbfa checkpatch: error - spacing
Change-Id: Ie051000e3d3f0f5bdc330d0265010c37acb873bd
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky e8563c2f97 checkpatch: error - trailing_whitespace
Change-Id: I819d13f0d7a23e3a61dcda6a3ced18810b192158
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Allan Stephens eff3508f16 x86: Remove cosmetic traces of Diab toolchain
Updates several files to remove mention of Diab toolchain
support, which is no longer supported. These changes do not
affect system operation.

Change-Id: If9de85e595f6685295e565bc94ca17f51d87513f
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:32 -05:00
Dirk Brandewie 147d6585ae x86: arm: Modify IRQ_CONFIG macro to have same signature as ARC
In order to have drivers that are usable cross architecture the
signature for IRQ_CONFIG needs to be the same to avoid #ifdef hell in
the driver code based on architecture.

Update the macro and it usage for existing drivers

Change-Id: I22e142b21d4e984add231d1dbd97020e4823985f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:31 -05:00
Dan Kalowsky e4bb957a00 checkpatch: error - pointer_location
Change-Id: I9ce224cb75ba21caecffd6747833257f748b5ecf
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:31 -05:00
Dan Kalowsky 39063598db checkpatch: error - spacing
Change-Id: Ie6e1c43581dd4b0734625b3a4e59a4ca79619e99
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:31 -05:00
Allan Stephens a860cb7bff init: Support fine-grained device initialization priorities
Introduces the SYS_DEFINE_DEVICE() macro, which supports 5 distinct
levels of device initialization and 100 priorities within each level.

Note: The existing init macros (e.g. nano_early_init()) have been
adapted to utilize the enhanced initialization model, but will
eventually be retired.

Change-Id: If677029d8b711a3fae9b2f32b5470cd97d19aeda
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:30 -05:00
Tomasz Bursztyka 86db1b37bd arc: IRQ_CONFIG should not enable the irq
Drivers do it by themselves, usually either in a dedicated irq
configuration function or direcly in their initialization routine.

Change-Id: Id1cca1a1e3e3f36264d99d1d2f2d651d84e0687e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:29 -05:00
Tomasz Bursztyka 7193a3e007 sys_io: arc: Add sys_in*/sys_out* functions
This functions - reusing _arc_v2_aux_reg_* ones - will ease porting
drivers to ARC architecture hiding arch specific calls under generic
functions. On ARC, auxiliary registers is conceptually comparable to
x86 ports, thus the possibility to bring sys_in/sys_out to access those.

Change-Id: Ic5c0fc41f32ec4ad861dbb58cd8defaf4497bc03
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:29 -05:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Peter Mitsis 5705d06874 x86: Properly initialize _interrupt_vectors_allocated[] bitmap
Updates the 'gen_idt' tool to generate a bitmap of (statically) allocated
interrupt vectors that is linked into the final image in a manner similar to
the static IDT. The kernel then uses this bitmap when dynamically connecting
an interrupt vector, thereby preventing the dynamic irq connections
from clobbering the static irq connections.

Change-Id: I0a8f488408dad4912736865179f32f63ff1ca98f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:28 -05:00
Peter Mitsis 56fa1a98d0 x86: Update generation of static IDT
Adds two new fields to the ISR_LIST structure (irq and priority) to allow
the decoupling of the vector ID and priority from the IRQ number at some
future time.

As a result of the addition of these two new fields, the gen_idt tool is
modified to both process these new fields as well as validate them.

Change-Id: I343dac68d99c78168a25b19784140f85d5db7578
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:28 -05:00
Peter Mitsis 25359412ba x86: Do not use IRQ priority for DPL
Fixes a bug in the x86 IRQ_CONNECT_STATIC() macro that resulted in setting
the DPL for the interrupt to the IRQ priority level.

Note 1: Using a proper value for the DPL (instead of the priority) prevents
the corruption of the other IDT fields.

Note 2: The priority of the IRQ is completely ignored.

Change-Id: Ic9f59bd91db4b356263f533cc26a0168b1d236e1
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:28 -05:00
Andrew Boie d82e9dd9e1 x86: HACK force alignment for _k_task_list section
We are seeing on some platforms that the VMA alignment
does not match the LMA alignment for this section, resulting
in problems when copying into RAM by __csSet(); any copied
sections afterwards end up misaligned in RAM.

While the true fix for this is under investigation, force
4-byte alignment for VMA and LMA.

Change-Id: I627d9e7a3446cbc09dc310a156d8b3268e61c91d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:23 -05:00
Juan Manuel Cruz 69d1939037 arc: add IRQ configuration macro
Change-Id: Ib33142889afc9bef8600147b541770322f094611
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif 629e69b493 doxygen: fixed typos and parameter references
Change-Id: Ica65e2cd0e49c08b1b8b086614267caef632c891
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif 45644140b0 doxygen: Fixed formatting and parameter references
Also fixed a few typos

Change-Id: I777d582ac6f8b188d0734570a59888e166468837
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif 6661fbc407 doxygen: fixed typos and parameter references
Change-Id: I8ff21156959a8960f6cea9441f25f1d17df2aa4f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif 218e148ade trivial: fixed typo addressible -> addressable
Change-Id: I1fde074c3747862fd34319ad7ae0bb8a9a8bb7e5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif 46b11bebc0 doxygen: fixed typos and unsupported doxygen commands
Change-Id: I57711eb5711736362421597a42faf787dcc5e3f6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Anas Nashif f4c259e750 doxygen: fixed documenation build warning in x86/arch.h
- Wrong @param
- Unsupported xml/html
- misspellings

Change-Id: I223f644d4e32293b291d9cb196a8dd19b8827dbb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:19 -05:00
Daniel Leung 8253b90cfc microkernel: add task pointer list
Due to similar padding issue as pipe, the list of task object
may not be used directly. As mentioned before, some compiler/linker
may pad the large struct. For example, compiling under gcc and
march=i686 pads the struct to 32-byte alignment (march=atom to
64-byte alignment). This causes issue with sizeof() and pointer
arithmetic because they have no idea about the padding.
When the stars align in a certain way, these task structs may be
corrupted. So add a task pointer list and use it for task
manipulation. The task list remains as it is beneficial to group
them together to take advantage of cache locality.

Change-Id: I0e86bfe05742040f4540d7854c1ac14e76162776
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:58 -05:00
Juan Manuel Cruz 6525b656cd arc registers: fixes the macros to read arc registers
This commit fixes small errors on the asm implementation of arc
register reading and the built-in functions call.

Change-Id: Iea2df715eaefb25095770971ac03d441311abf16
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:15:36 -05:00
Dirk Brandewie 0a7e4d1b9b Fix arc interrupt configuration
The _ARC_V2_IRQ_VECT_BASE register must be set to the vector table in
flash.

Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change-Id: Ied5451c98222f545cd669967023aef26c3d8e48e
2016-02-05 20:15:35 -05:00
Tomasz Bursztyka b4e795b78c arc: Fix the sys_io.h operations to work on both registers and addresses
- Finally switched from ldw/stw to ldh/sth, as Benjamin noticed in an
  earlier comment (I was using ARC ISA, and not ARC V2 ISA). So indeed
  ldw/stw are obsolete and equivalent to ldh/std.

- clear, set and test were not working in case of using a memory address
  which would not point to a register: bclr, bset and btst requires
  registers as operands, and cannot deal with pure memory address (i.e.
  something like [rx] is not valid), thus the requirement to load first
  the value pointed by the address into a register, operate on that
  register and storing the result of it into the pointed address.

Change-Id: Ib9c24c0a2c6d2b02e2d08d24f31cbc1981536a7d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:15:35 -05:00
Anas Nashif 952cd52e16 doxygen: nanokernel doxygenation
Doxegenize and cleanup headers for nanokernel
 - fibers
 - context
 - timers
 - stacks

Also minor cleanup of x86/arch.h

Change-Id: Ib65568d4ec034b69e8a6214ba4b52a7f719300bb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:34 -05:00
Tomasz Bursztyka 7ea05b4a09 sys_io: Implement the API for ARC architecture
sys_in/sys_out are not implemented as there is no "ports" in ARC.

Change-Id: Ie72d6274ae1a2b2ca22955a9764e281e7669b973
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:15:31 -05:00
Tomasz Bursztyka 507decb731 sys_io: Add memory bit manipulation functions
This will be helpful also in drivers mostly, where non-atomic bit
setting could be unnecessary.

Change-Id: I10c069387d1045f14337b3ac8acfc7b6c1f106c3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:28 -05:00
Tomasz Bursztyka c6d0bea109 API: Add a generic API for port and mem mapped registers functions
sys_io.h header file declares the generic API for such operations. It
properly separates port and memory mapped registers, with declaring
respective types: io_port_t and mm_reg_t.

Memory mapped registers are the most common type of registers drivers
will play with. Thus providing generic sys_readX/sys_writeX functions in
sys_io.h. Those are defined as inline as they are really simple.

Ports are mostly (always?) found in x86 architecture.
Currently no ARM or ARC header file propose any implementation of
those. If really necessary (a cross-architecture driver using
sys_in/sys_out functions), those architecture will provide the proper
implementation or at least a macro gluing those towards
sys_read/sys_write.

Change-Id: If77590d4bcefcdfa6aa181a88ced342f8565d5b8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:28 -05:00
Anas Nashif 2b8af552f2 remove duplicate 'inline' declaration specifier
Change-Id: Ib5bc7a402874e2ec215d4571e25e75e161453f05
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:28 -05:00
Benjamin Walsh 97f2622f55 arm: rename instances of CortexM
Directory names: CortexM -> cortex_m
Code comments: CortexM -> Cortex-M

Change-Id: If946ed25fac863e0be9dbb6f6c275199402b0b0a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Benjamin Walsh 0dcad8331b clarify use of term 'context'
The term 'context' is vague and overloaded. Its usage for 'an execution
context' is now referred as such, in both comments and some APIs' names.
When the execution context can only be a fiber or a task (i.e. not an
ISR), it is referred to as a 'thread', again in comments and everywhere
in the code.

APIs that had their names changed:

  - nano_context_id_t is now nano_thread_id_t
  - context_self_get() is now sys_thread_self_get()
  - context_type_get() is now sys_execution_context_type_get()
  - context_custom_data_set/get() are now
    sys_thread_custom_data_set/get()

The 'context' prefix namespace does not have to be reserved by the
kernel anymore.

The Context Control Structure (CCS) data structure is now the Thread
Control Structure (TCS):

  - struct ccs is now struct tcs
  - tCCS is now tTCS

Change-Id: I7526a76c5b01e7c86333078e2d2e77c9feef5364
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Anas Nashif 4ca0b0b96b add missing includes from toolchain
Change-Id: Ic60955df6644d2a15897c6b6c082890b2ccd2371
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:26 -05:00
Anas Nashif b2f5c48755 remove shared/ and create files directly
The files idtEnt.h and segselect.h in shared are linked from
the source tree for no good reason adding and extra top level
directory that might be confusing.

The shared/ here means shared between host and target, this is
not longer necessary in our build system.

Change-Id: Id9665e10de7a1d290888d9069be3db9f4330d284
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 7710d0e083 ffs: change find_[lsb|msb]_set parameter type to uint32_t
Highlight the fact that find_[lsb|msb]_set operate on a 32-bit word.

Change-Id: I24cee7709ea6497508dbc7f96a7b4d74fa4bc257
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 1bab46dca1 ffs: rename find_[first|last]_set to find_[lsb|msb]_set
The new names reflect better what the functions do: they find the first
bit set starting from the least or most significant bit, i.e. they find
the least or most significant bit set, in a 32-bit word.

Change-Id: I6f0ee4b543f6f37c2f08f7067e14e039c92a6f6a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 910970ed0f ffs: remove non-inline find_[first|last]_set()
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Peter Mitsis 92d1810def Fix typo: occured -> occurred
Change-Id: I40150719135108f18834a35db1c5be7ca4c5c9b2
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:15:21 -05:00
Benjamin Walsh 2c5086cc65 irq: remove non-inline irq_lock/unlock
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: I7314b96c42835f15df4c537ec11ab7961d4ee60f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:21 -05:00
Benjamin Walsh c1f9fd888d irq: make utility functions private
irq_handler_set, irq_priority_set and irq_disconnect have been made
private by prepending an underscore to their names:

	irq_handler_set -> irq_handler_set
	irq_priority_set -> irq_priority_set
	irq_disconnect -> irq_disconnect

The prototypes have been removed from header files when possible, and
extern statements used in C code where they were called.

_irq_priority_set() for ARM is still in the header file because
IRQ_CONFIG() relies on it.

Change-Id: I2ad585f8156ff80250f6d9eeca4a249a4477fd9d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:21 -05:00
Andrew Boie 91156d9c7a arc: standardize ffs function names to match other arches
Change-Id: I4f384960f4c6698ef98ecf3941c30f849832135e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:15:20 -05:00
Daniel Leung 0abe07a0cd microkernel: introduce support for private memory maps
This enable defining memory maps in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_MEM_MAP(mem_map_name, ...). The memory maps created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
memory map APIs.

Define the memory map using:

  DEFINE_MEM_MAP(mem_map1, blocks, block_size);

and "mem_map1" can be used, for example:

  task_mem_map_alloc(mem_map1, ...);

or,

  task_mem_map_free(mem_map1, ...);

etc.

To use the memory map defined in another source file, simply add:

extern const kmemory_map_t mem_map1;

to the desired C or header file.

Change-Id: I9c551b90f9d0a95f961fd8ec1c5278c2ea44312d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Daniel Leung 201aa8c708 microkernel: put memory map pointers into its own binary section
The _k_mem_map_list was a static array generated by sysgen,
where it containing all pre-defined memory maps from MDEF file.
To support private memory map objects (aka, defining them within
source files), the list has to accommodate memory maps that
are not only processed through sysgen, but also those defined
within source files.

This is done by creating a new section in binary, and all memory
map pointers go into this section. By doing this, the list
can still be manipulated as an array.

Change-Id: I1f3414b72f685fef4b99850749178661f14d9345
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Daniel Leung b5517ab61c microkernel: introduce support for private pipes
This enable defining pipes in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_PIPE(pipe_name, ...). The pipes created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
pipe APIs.

Define the pipe using:

  DEFINE_PIPE(pipe1, size);

and "pipe1" can be used, for example:

  task_pipe_put(pipe1, ...);

or,

  task_pipe_get(pipe1, ...);

etc.

To use the pipe defined in another source file, simply add:

extern const kpipe_t pipe1;

to the desired C or header file.

Change-Id: Iae8e04706359bc18aae51acc75df3e3d26388882
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Daniel Leung 815d64522f microkernel: put pipe pointer list into its own binary section
The _k_pipe_list was a static array generated by sysgen,
where it containing all pre-defined pipes from MDEF file.
To support private pipe objects (aka, defining pipes within
source files), the pipe list has to accommodate pipes that
are not only processed through sysgen, but also those defined
within source files.

This is done by creating a new section in binary, and all pipe
pointers go into this section. By doing this, the pipe list
can still be manipulated as an array. The reason behind
putting the pointers to pipe, instead of the pipe objects
themselves, is that some compiler/linker may pad the large pipe
struct. For example, compiling under gcc and march=i686 pads
the struct to 32-byte alignment (march=atom to 64-byte alignment).
This causes issue with sizeof() and pointer arithmetic because
they have no idea about the padding. So use pointers here to
prevent padding.

Change-Id: I6d3b75614c4d8760c037a5c26746410d4e4b17cb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Daniel Leung 2bc5880d85 microkernel: introduce support for private tasks
This enable defining tasks in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_TASK(task_name). The tasks created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
task APIs.

Define the task using:

  DEFINE_TASK(task1, priority, entry_func, stack_size, groups);

and "task1" can be used, for example:

  task_start(task1);

or,

  task_abort(task1);

etc.

To use the task defined in another source file, simply add:

extern const ktask_t task1;

to the desired C or header file.

Change-Id: Ib2f3572950ca74b359b7fde1ccd6cfd04783eefb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Daniel Leung 75e5427e15 microkernel: put _k_task_list into its own binary section
The _k_task_list was a static array generated by sysgen,
where it containing all pre-defined tasks from MDEF file.
To support private task objects (aka, defining tasks within
source files), the task list has to accommodate tasks that
are not only processed through sysgen, but also those defined
within source files.

This is done by creating a new section in binary, and all task
objects go into this section. By doing this, the task list
can still be manipulated as an array, which is required for
task group operation.

Change-Id: I799d6967567079498bc414e0cb809e8af856b53e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:15:18 -05:00
Dmitriy Korovkin 4e3bce5e96 Add page-aligned padding to initlevel section for Galileo test load
Galileo testing uses Linux kexec() feature to load Zephyr OS.
kexec() requires all program headers page size aligned.
Add page size padding to initlevel section in order to make
BSS page aligned.

Change-Id: I7c0e309be70aef45b347b16c6d5c01bdf5659351
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:14:43 -05:00
Peter Mitsis 7cbad4e7dd Remove references to BSP from include/ directory
Removes references to obsolete BSP terminology.  Where appropriate, replaces it
with platform terminology.

Change-Id: If38c859338c7cf0de58430336e1046b28f9e9944
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:43 -05:00
Peter Mitsis 89e922243b arm: Use new SRAM and flash Kconfig options
The configuration of SRAM and flash options are no longer hardcoded in the
platform's linker script file, but are instead defined in the platform
configuration file.

Change-Id: I557a8228080d607f6add5f86b9b2509ed3fd31ce
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:42 -05:00
Anas Nashif 274cc72aee replace negative CMOV_UNSUPPORTED with CMOV
Change-Id: Id2aba9402495d99176eb499b1c74f86349e1164b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:41 -05:00
Anas Nashif 629dfc26c9 doxygen: Cleanup arch.h comments
Change-Id: I0c5743ab2db3cb1bc584ced4fa9d91c84da971b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:38 -05:00
Peter Mitsis a7644b86a5 Rename CONFIG_BSP_xxx to CONFIG_PLATFORM_xxx
Updates Kconfig option names as part of transforming BSPs to platforms.

Change-Id: If397bcac8b058e5700e82c3cabbfe64588316d1d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:37 -05:00
Anas Nashif f367f071b6 doxygen: add @brief and capitalize
Remove function name from comment and add @brief instead.
Also capitilize first letter.

Change-Id: Ib708b49bf02e5bc89b0066637a55874e659637e0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:33 -05:00
Anas Nashif 1362e3c162 doxygen: RETURNS: -> @return
Previous comment style used RETRURNS:, use @return to comply
with javadoc style.

Change-Id: Ib1dffd92da1d97d60063ec5309b08049828f6661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00
Anas Nashif ea0d0b220c doxygen: change comment style to match javadoc
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.

Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00
Oleg Zhurakivskyy 4d251f456b Add .debug_macro for DWARF4
Change-Id: I06a3f192b146fa015f933449cbe421fef8428e5f
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2016-02-05 20:14:27 -05:00
Anas Nashif ac47c45ca0 Rename Zephyr OS into Zephyr Kernel
We are a kernel, not an OS.

Change-Id: Ib987e3e511e1bdbed6293ab5e15e598bff00b09b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:26 -05:00
Dmitriy Korovkin 660878e4e2 irq_connect for x86 uses static stub array
In order to provide the same irq_connect() on all platforms
on x86, irq_connect() now uses a static array of interrupt
stubs. Device driver does not need to provide interrupt stub
to irq_connect() function.

Add NUM_DYNAMIC_STUBS configuration parameter, the number
of interrupt stubs used for dynamic interrupt registration.

Modify tests for unified interrupt register API

Tests that deal with interrupts are modified to work
with the new interrupt registration API.

Add CONFIG_NUM_DYNAMIC_STUBS option to dynamic interrupt projects

Projects that use dynamic interrupt handler registration on x86
have to include CONFIG_NUM_DYNAMIC_STUBS parameter in the
configuration.

Change-Id: Ic90c726485521a57cf695fd3edc8cac85d0b827d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:14:25 -05:00
Dmitriy Korovkin f661feee55 IRQ_CONNECT_STATIC implementation for ARM platform
IRQ_CONNECT_STATIC() macro provides static interrupt registration.
It creates an entry for _sw_isr_table, table of interrupt handlers.

IRQ_CONFIG() macro provides interrupt controller configuration.
On ARM platform it configures the priority of each interrupt.

_sw_isr_table is implemented the way that each of it's elements
is located in individual section. Sections are marked a "linkonce",
thus when a device driver declares an interrupt handler, it overwrites
the default _sw_isr_table entry.

Change-Id: I182bf7158dd67f45b597783dca038a4f78166a03
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:14:25 -05:00
Dmitriy Korovkin 6dd108a263 IRQ_CONNECT_STATIC implementation for x86 platform
In order to simplify x86 interrupt stub creation, each interrupt
controller implements an interrupt stub definition macro.

Add IRQ_CONNECT_STATIC() for static interrupt registration, and
construct the interrupt stubs name from device and interrupt
handler names.

Add IRQ_CONFIG() macro for the interrupt controller configuration.
On x86 platform it programs APIC to associate an IRQ number with
the interupt vector.

Add HPET_TIMER0_INT_PRI parameter to Quark platform header to
make it build correctly.

Change-Id: I24ad25e1aa807ffa63733a27ad882877fcad72af
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:14:25 -05:00
Peter Mitsis 192a316ef4 Remove references to Cortex-M0
The Cortex-M0 processor is not supported.

Change-Id: I3ada6615a8b41eb318f80edb13947f70459c761b
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:25 -05:00
Peter Mitsis 25fd37d9d5 Rename option CPU_CORTEXM to CPU_CORTEX_M
Makes name more consistent with other CPU_CORTEX_M* options.

Change-Id: I65968cb300207ba0de6231d9a67f2720be77b6ba
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:25 -05:00
Peter Mitsis 9bf659afa5 Introduce CPU_CORTEX_M3_M4 option
CPU_CORTEX_M3_M4 replaces CPU_CORTEXM3 as the umbrella option for Cortex M3/M4
processors.

NOTE: Selecting CPU_CORTEXM4 still currently forces the selection of
CPU_CORTEXM3.  Breaking that forced select will be done in a later commit.

Change-Id: I0f36b3a2adc5c6c66db4e9b6353b921199544deb
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:25 -05:00
Benjamin Walsh 3284865323 arm: fix __assert.h inclusion in asm files
The #include <__assert.h> in nvic.h must be guarded by __ASMLANGUAGE
since nvic.h is usable by asm code, and __assert.h is C-only.

Change-Id: I16d72e4579705dbd0bfb55a787525c5938fd1f22
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:14:21 -05:00
Juan Manuel Cruz 308f1586d6 Kbuild: Assembly code extension.
This commit set back .S as the assembly code extension for Kbuild.

Change-Id: Ib0119876bd0bed6617bbfbad2ca6a44e172ab042
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:14:20 -05:00
Anas Nashif 54ac4484d7 Rename VXMICRO_ARCH and VXMICRO
Change-Id: I6f3858de98333ec466aa876c5f2887faa8e276e2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:16 -05:00
Anas Nashif f2520f87a2 Rename VXMICRO_ARCH_arc -> CONFIG_ARC
Change-Id: I4aca181523f50f43ee01e1be0c20a9ad844ef618
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:16 -05:00
Anas Nashif 274622ea69 Rename VXMICRO_ARCH_arm -> CONFIG_ARM
Change-Id: I32b2e39781825504e7936b3df0c864988650c35c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:16 -05:00
Anas Nashif 191fc279ce Rename VXMICRO_ARCH_x86 -> CONFIG_X86_32
Change-Id: Ie1bcfebce1db838ea994cb3626396ea032225830
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:16 -05:00
Allan Stephens 5189844df5 Eliminate VxMicro branding in kernel code
Eliminates references to the obsolete OS name. In most cases the
name is simply removed, as it isn't necessary.

Change-Id: I32f9e7390e436aec008a9454b72657e129d65152
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens d0ed154421 Eliminate nanokernel's private.h file
This file doesn't belong in the architecture-specific portion of
the tree, and its contents don't warrant their own file, so the
content is moved to the main nanokernel public API include file.

Change-Id: I0455fc9eb4f5ca31a8e6b487f56b09d0562fdb77
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens bff7fc17fe Begin consolidation of arch-independent private nanokernel APIs
Introduces nano_internal.h, which will declare all architecture-
independent non-public nanokernel APIs. This file is automatically
incorporated by the various architecture-specific include files
for non-public nanokernel APIs, and will not normally be included
directly by any other files.

Change-Id: I9f3de812a5747cc720fa0ff739007315e8d07dd9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 24dd3044ca Relocate declarations for public nanokernel object types
These declarations are now co-located with the declarations
for the routines that utilize them.

Change-Id: I70940923d9e424345aeac60cb5ddd7f7a2a54734
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 53165a631b Eliminate architecture-specific init.h files
These files now have no useful content.

Change-Id: If5d2df361eb8769ca38c4ae63f68a5681b3ad85b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 0c3fd0afc2 Relocate declarations of _nano_fiber_swap()
These now appear in the files which declare other non-public
nanokernel APIs.

Change-Id: Iea01d6de44851a08b308004b2c3104c08b020970
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens f547a5b7b8 Eliminate cputype.h and its arch-specific derivatives
Since cputype.h no longer has any meaningful content it can be
eliminated, along with the arch-specific files it incorporated.
(This means that the arch-specific nanokernel public APIs are
now referenced only via cpu.h and its derivatives.)

Change-Id: I7f35b6c3c6c092d61c372ff85d73e49414474938
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 03a2abe737 Relocate macros for supporting non-byte addressible architectures
Moves these macros to the main public API include file for each
supported architecture, since the <arch>type.h include file is
to be eliminated.

Change-Id: Ia87b9c0bed1501bcce7f363bd4155f7ef642376a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:14 -05:00
Allan Stephens d6db256249 Add missing #includes required to reference non-kernel APIs
Several files were not explicitly including APIs that they reference,
which could eventually lead to trouble.

Change-Id: Ib33cadfa658280df3fcb4c670463d41b63097b31
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:14 -05:00
Dirk Brandewie c9ac95a43a device: Add device model infrastructure
Add infrastructure support having multiple instances of a driver
configured into the system each with its own compile time
configuration information.

Change-Id: I1e447af18311139b43f74fe0439483ccd132b63f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:14:14 -05:00
Peter Mitsis ad74658009 Add __stack tag for aligning task/fiber stacks
The "__stack" tag is to be used to align an array (to STACK_ALIGN) for stack
use by either a fiber or task.

Change-Id: I5828f3ee1b09b0b5ba894ea30689d179de347494
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis db8a41c90d Replace use of __attribute__((packed)) with __packed
The __attribute__ keyword is toolchain specific.

Change-Id: Ia3c0ff54d778785679c864704f8db6a3ba898948
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis ad39ee1c96 Replace __attribute__((aligned(x))) with __aligned(x)
The __attribute__ keyword is toolchain specific.

Change-Id: I2183d154ccdb9b5bed3bc245cc37cbf4c5cc62cc
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis 19a0ee4d24 Rename missed instances of nanoFiberStart()
Completes the renaming of nanoFiberStart() -> fiber_fiber_start().

There is little value in listing the callers of _NewContext() in its function
header.  Not only was the (deleted) list both incomplete and wrong, keeping
it around and properly updated requires error prone maintenance.

Change-Id: Ic45f51b285c027a2e8be331c0d28c16bdc97647d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis f8619b4181 Refactor _Cget() to invoke _NanoFatalErrorHandler()
It is a fatal error if the microkernel is configured with either too few
command packets or too few timer packets.

NOTE: During this refactoring of _Cget(), not only is it renamed to
_nano_fiber_lifo_get_panic(), but it is moved into "nano_lifo.c".

Change-Id: I1d866cda1b444da04877f7eda03762b6e83c9a6f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis 7d2fc8ec22 Add _NANO_ERR_ALLOCATION_FAIL fatal error code
This reason code will be used indicate that the kernel failed to allocate a
critical resource (such as a command packet or a timer packet).

Change-Id: I6d4c3d96fc70b2b8cab4027b1b8e4febf4d6c474
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens d1ebe66b84 Eliminate definition of tick event for ARC
Since ARC does not support the microkernel, there is no need to
define any microkernel event symbols for it. (And TICK_EVENT is
an architecture-independent concept anyway ...)

Change-Id: I918a55743f8685ef23b9bb5a8afc67b905ab9766
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens 2f3a261431 Eliminate definition of debugging agent event
This symbol is no longer referenced.

Change-Id: Ic24d7b77f2034cac885e24a0f06373da4f169ff5
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens d216a00adc Clean up private APIs that mark context as (non)essential
1) Renames APIs to align them with conventions used by other
   general-context nanokernel APIs.

2) Relocates implementation of these APIs to the architecture-
   independent portion of the nanokernel.

Change-Id: I1aa60029aaa96697cd8fcb594bbae23ba6656661
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens 3c0b6f0379 Eliminate definitions of k_memset() and k_memcpy()
These APIs are no longer referenced anywhere.

Change-Id: I56e3410b9fb6bc4eb72bc9299b33f75227916434
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:12 -05:00
Allan Stephens 63720a9af3 Eliminate secure string error handling
This is not required since the secure string library routines
have been removed.

Change-Id: I284a21e4167d9bb6f78354d809c563a4c52f619c
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:12 -05:00
Dan Kalowsky c02dd34277 Renaming include/nanokernel to include/arch
Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.

Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:14:12 -05:00