Add needed uart pinctrl configuration in pinmux node.
Populate stm32 f1 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
<soc>.dtsi files
Populate stm32 f3 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
the <soc>.dtsi files
Populate stm32 f4 based boards dts files with references
to uart pinctrl nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pinctrl node on stm32l4 soc dts files, including uart
pinctrl configurations. This is done thanks to <soc>-pinctrl.dtsi
file matching the <soc>.dtsi file
Populate stm32 l4 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f4 series, introduce a stm32l4.dtsi file which
represent the smallest common denominator of IPs in
the family.
This allows to fix usart4 availability on stm32l432
which was not correct.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f3.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f334 includes stm32f303, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f1.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f103Xe includes stm32f103xb, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add "clocks" property on u(s)arts nodes on stm32 socs
Add a dt clocks binding file and rework clock_control
header file include new device tree binding file.
include/dt-bindings folder is introduced as dt-bindings
placeholder
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove memory node from skeleton dtsi and add device_type
property in every memory node in soc dtsi files
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch add the unit-address component to memory and flash
nodes. According to the DT specification, the unit-address of
a node must match the first address specified in the reg
property of the node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch adds #address-cell, #size-cell properties to
cpus container node and device_type, reg properties to
cpu node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The I2C controller nodes are the root of the I2C bus for that controller
and thus may have children nodes that represent the I2C devices on that
controller. Thus we need to specify the #address-cell & #size-cell
properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add configuration and memory definitions to support STM32F103x8
Medium-density performance line SoC with 64 KB Flash.
Merge multiple files into single Kconfig.defconfig.stm32f103xx
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Add necessary Kconfig and minimal device tree in order to support
STM32F412ZG variant as found on the Nucleo STM32F412 board.
Origin: Original
Change-Id: Ic98a686f478ce551dc6101466ed0cf16924109e8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit rework stm32f4 series dtsi files hierarchy.
stm32f4.dtsi was used as maximum common set of IP while it should
be considered as the minimum common subset.
Then, following on stm32f4 series hierarchy and inheritance rules,
stm32f4xxx.dtsi files are reworked to include the "parent" soc dtsi
file and then add own IPs to each SoC.
Change-Id: I394278c84a8ea38921f9f143f4fc52ef1c645d05
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In stm32 dtsi linux files, uart generic node name is serial.
Rename uart node names of stm32 dtsi files from uart@ to serial@
Change-Id: Iac5cbf7955f23cee520bc1790b0f324a17bfcf9e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit fixes uart only nodes situation for stm32 devices.
st,stm32-uart yaml description is added to enable compilation
Change-Id: Iea78693bdfb90fbb09612b75685ed7ca0ccca6d6
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add configuration, dtsi and memory configuration fixup for the
STM32F469XI High Performance SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Now that we can utilize label in the device tree we can convert to
getting the device name for the STM32 UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add missing UARTs from the main device tree. They are declared as
disabled and can be enabled individually by each board.
Change-Id: I0ec73c59b4c3c4ee56f12ae70f2d6cdbec14fe33
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary Kconfig and minimal device tree in order to support
STM32F413xH variants as found on the Nucleo STM32F413 board.
Origin: Original
Change-Id: I60230c240d6acb610f16a02c62048d448476e9c5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Rename SOC_STM32F407XX to SOC_STM32F407XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file).
Change-Id: I0afa16e86b7c99b9e685004f96beeb888f9e7568
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32F429XX to SOC_STM32F429XI to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: Id188b7703d2bce0a3ded09132ff0f205efa9c143
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The xC tag in the SoC reference indicates the flash size, use it in the
configuration to permit selection of correct flash size for dts.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for STM32L475xG SoC as a preliminary for
Discovery IOT board support.
stm32l476.dtsi file is now including stm32l475.dtsi
since STM32L476 SoC is a STM32L475 SoC with LCD support
Change-Id: I7567255e4172231cbf4899474617ecae0cd68d64
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updated st/mem.h to support the following SoCs:
CONFIG_SOC_STM32F303XC
CONFIG_SOC_STM32F407XX
CONFIG_SOC_STM32F429XX
Change-Id: I1654c1fd8dc0d1eb471c092777a8fd262465dc51
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a __SIZE_K macro to make things a bit more human readable.
Also fixed up sizes for CONFIG_SOC_STM32F411XE.
Change-Id: I01b8b5f627ad949c2af01ee966428bfabe09e2ee
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides dtsi files for available stm32 base boards.
For now only uart nodes and IRQ number are provided in order to
enable delivery of coherent material.
It also clears additional content from stm32f103xb.dtsi
Change-Id: I62d932c7f22b56e95bcd9566ce39e14a393dd640
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As there can be a large number of FLASH & SRAM sizes for the same SoC
having a dts/dtsi for each one would be extremely painful. Lets just
use some #defines to set that FLASH & SRAM sizes based on the SoC that
is being built.
Change-Id: I06388ada4e49ed3d576da31150288512bb6b4485
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the SoC dtsi into a vendor dir so as we grow and possibly share
things with other projects we are hopefully in sync (or closer to it).
Change-Id: I71666cff49f9694eee3f5d92dac8aeea416b730a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Erwin Rol