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39,074 Commits 149 Branches 178 Tags 877 MiB
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10 Commits

Author SHA1 Message Date
Andrei Gansari b5d38b02de dts: lpc55xxx add mpu 
MPU added to LPC55xxx dts configuration.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2020-03-12 12:24:12 +02:00
Andrei Gansari fc9b66bd66 dts: nxp_lpc55S6x_ns.dtsi added 
Added non-secure mappings for LPC55S6x SoC family.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2020-03-12 12:24:12 +02:00
Andrei Gansari 5ac450ecc4 dts: lpc55s6x flash controller add 
Added flash controller and all memory mapped regions to DTS.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2020-01-16 08:19:46 -06:00
Andrei Gansari fb9a41dc0b dts: lpc55s69 all flash regions 
Added reserved partition and bootrom partitions.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2020-01-16 08:19:46 -06:00
Maureen Helm 88fcded3b0 dts: boards: Define dts aliases at soc level for lpc socs 
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all lpc socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
 2020-01-13 10:22:44 -05:00
Maureen Helm 30415e9246 dts: Add spi bindings and nodes for lpc socs 
Adds spi device tree bindings and nodes for the lpc54xxx and lpc55s6x
socs in preparation for adding a new spi driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
 2019-12-10 08:48:56 -06:00
Andrei Gansari a0f011b2fb dts: lpc devices allocate all gpio interrupts 
Allocate all 8 PINT interrupts to ports 0 and 1, allocate 4 to each.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2019-11-13 12:05:48 -06:00
Andrei Gansari 2e27363e67 dts: NXP LPC gpio updates 
NXP's LPC family of MCU's GPIOs parameters is udated.
Boards LPC54xxx and LPC55xxx have updated values according
pin and interrupt layout.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2019-11-13 12:05:48 -06:00
Kumar Gala 8859089d6c dts: lpc55s6x: Fix SRAM-X address 
Fix the address SRAM-X is located at (0x1400_0000).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-07-02 17:35:27 -05:00
Andrei Gansari b342258b85 dts: LPC55S69 initial device tree 
Create device tree for LPCXpresso55S69 board.
Single core (cpu0) is currently supported.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
 2019-06-03 15:49:35 -05:00