Most implementations have the same logic, with only a different write
block size. Now that we are using write-block-size from the device tree,
it is possible to use a default implementation that can be overridden if
necessary.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Introduce flash extended operations that can be used to disable access
to option and control registers until reset. Disabling access to these
registers improves system security, because flash content (or protection
settings) can't be changed even when exploit was found.
On STM32 devices, registers can be locked until reset by writing wrong
key during unlock procedure. It triggers a bus fault, so during the
procedure we need to ignore faults and clear bus fault pending bit.
Please note that option register disabling was implemented for devices
that have OPTCR register (F2, F4, F7 and H7). Implementation on other
devices requires more testing, since documentation is not precise
enough. Disabling control register was implemented for devices that
have CR register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds flash readout protection support for STM32F4 devices
family. These devices can enable protection on entire flash content.
Readout protection functionality was exposed as vendor extended
operation. To change readout protection state, caller should provide a
structure which describes desired RDP state.
Enabling readout protection permanently or disabling readout protection
(changing from level 1 to level 0) is guarded by
CONFIG_FLASH_STM32_READOUT_PROTECTION_PERMANENT_ALLOW and
CONFIG_FLASH_STM32_READOUT_PROTECTION_DISABLE_ALLOW respectively.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds sector write protection support for STM32F4 devices
family. These devices can protect flash content with sector precision.
Write protection functionality was exposed as vendor extended operation.
To change write protection state, caller should provide mask of enabled
and disabled sectors.
Function responsible for locking/unlocking option bytes was implemented
for all STM32 devices supported by this driver.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Introduce the stm32h5 serie to the the existing flash driver
It is based on the stm32l5 model.
Add a function to check if the flash is in dual
or single bank mode.
Some stm32 devices can map 2 or 1 flash banks.
Adapt the FLASH register names for the stm32h5 mcu.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In case of errors in the status register and to
unblock Flash, it is advised to clear the errors.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Unlocking CR at the end of initialization was added in commit
a9183cd518. It was probably copied
from previous flash driver implementation.
Unlocking and locking CR in write and erase functions was added in
commit 6e4cdb0c99. Since we always unlock
the register before writing or erasing, and lock it after the operation
is finished, there is no need to unlock it after initialization.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Refactors all of the on-chip flash drivers to use a shared driver class
initialization priority configuration, CONFIG_FLASH_INIT_PRIORITY, to
allow configuring flash drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Driver-specific options for SPI-based flash drivers are left intact
because they need to be initialized at a different priority than on-chip
flash drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Some series (namely g0, u5, wb, wl, ?) use CFGBSY to indicate
that FLASH_CR is not ready to be modfied.
This commit adds this flag additionally to other the flash busy flags,
in flash_stm32_wait_flash_idle such that the driver waits before
trying to modify PG, PNB[6:0], PER, and MER bits in FLASH_CR.
Additionally, dual bank variants of STM32G0 have a seperarate BSY2 flag
for flash bank two.
Until now this was not yet checked in flash_stm32_wait_flash_idle.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In STM32G0 HAL FLASH_FLAG_xxx defines don't follow the pattern of
other Series to simply redefine the FLASH_SR_xxx Msk.
Instead an ID for the SR reg and the position of the Error flag
are defined.
As a result error checking in flash_stm32_check_status was not working
until this fix on stm32g0 series.
In order to avoid complexity in the driver, the ifdef-ery of the flags
was moved to the header file.
Other series except g0 use FLASH_FLAG_xxx defines, because those
are valid for both cores in dual core(wl) and in secure/non-secure
targets(l5,u5).
FLASH_STM32_SR_ERRORS mask is introduced to check for any active error
in the SR.
The flags for SIZERR, MISERR, FASTERR are newly introduced.
the latter two are only required once fast programming is used,
which is not yet the case for any series.
The FLASH_SR_OPTVERR flag (option validity flag) is also present
in the SR, but is not added.
Also ecc errors are generally not checked, but these are in a different
register.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
An attempt to simplify the ifdef-ery around FLASH_SR is made.
Define Registers and flags in the header file instead of including
several individual operations in the driver.
FLASH_FLAG_BSY is not only defined for STM32L5, but also other series.
Therefore use this flag instead of FLASH_SR_BSY.
Only the g0 series definition is not valid in our context,
therefore use FLASH_SR_BSY1 instead.
No functional changes, only refactoring.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This commit adds flash driver in non-secure mode for stm32l5x
series with icache enabled. This commit also adds a flash
programming error status check applicable for all platforms
except stm32f1 series.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This commit removes the huge if condition section and is
replaced with DT APIs to get the maximum erase time of a
stm32 flash from dtsi.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
The flash_stm32l4x driver seems to work out of the box on the WL series.
This just adds the necessary config changes to let the driver build and
run when SOC_SERIES_STM32WLX is selected.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit adds the flash driver for nucleo_f207zg platform.
This has been tested with flash test application.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
flash_write_protection_set() API was deprecated so driver
implementation interface is left behind as well.
This patch removes all implementation pointed by the interface
'struct flash_driver_api.write_protection'.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Convert from device_get_binding to DEVICE_DT_GET. In doing this we
no longer need the label in the devicetree node so we remove that.
Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add weak function to check flash configuration.
On stm32g4: single bank configuration not supported
when dual bank capable.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Add support for STM32L0X using the generic STM32 backend. This is
quite a significant change since the L0 series uses a slightly
different flash controller. Refactor the generic backend to better
support different block sizes and the L0's register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
With addition of flash_parameters structure, and supporting API call
to retrieve it, it is no longer needed to store write_block_size as
a part of flash_driver_api and it should be part of flash_parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Instead of various series compatibles, use single stm32 generic
compatible as reference for stm32 flash driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Replace use of DT_FLASH_DEV_NAME with DT_INST_LABEL in drivers as we
want to phase out DT_FLASH_DEV_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use valid stm32 flash driver compatibles instead of flash
area compatible.
For 'write_block_size' property, use reference to soc-nv-flash.
fixes#23997
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Kernel timeouts have always been a 32 bit integer despite the
existence of generation macros, and existing code has been
inconsistent about using them. Upcoming commits are going to make the
timeout arguments opaque, so fix things up to be rigorously correct.
Changes include:
+ Adding a K_TIMEOUT_EQ() macro for code that needs to compare timeout
values for equality (e.g. with K_FOREVER or K_NO_WAIT).
+ Adding a k_msleep() synonym for k_sleep() which can continue to take
integral arguments as k_sleep() moves away to timeout arguments.
+ Pervasively using the K_MSEC(), K_SECONDS(), et. al. macros to
generate timeout arguments.
+ Removing the usage of K_NO_WAIT as the final argument to
K_THREAD_DEFINE(). This is just a count of milliseconds and we need
to use a zero.
This patch include no logic changes and should not affect generated
code at all.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Convert older DT_INST_ macro use in STM32 drivers to the new
include/devicetree.h DT_INST macro APIs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit introduces some logs in the stm32 flash implementation.
Thith the logs it is easier to locate problems when they arrise.
Signed-off-by: Alexander Wachter <alexander.wacher@leica-geosystems.com>
Don't use DT_INST_0_SOC_NV_FLASH_LABEL as device name.
Use DT_FLASH_DEV_NAME instead
Fixes#23678
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use DT_INST_ defines.
Removed DT_FLASH_DEV fixup macros, except DT_FLASH_DEV_NAME
used in applications.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove soc/arm/st_stm32/stm32YY/flash_registers.h files.
Change register accesses in stm32 flash drivers to use FLASH_TypeDef
from modules/hal/stm32/stm32cube/stm32YYxx/soc/stm32xxxxxx.h.
Fixes#16235
Signed-off-by: Sarvesh Patkar <psarvesh314@gmail.com>
Roland Lezuo