This needs to be pushed down to the SoC level, as it's an Apollo Lake
feature, not a feature of the UpSquared. Remove the Apollo Lake
references to the PCI devices because these will not be used when I2C
support is restored.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Sets the HPET timer frequency (enabled by default) to 19.2MHz.
And also sets the local APIC timer frequencies according to
the SoC variant.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add the necessary bits to enable the I2C controllers on
the UP Squared board. Only the ones exposed through the HAT
connector(s) are enabled by default.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a primitive board configuration for the UP Squared board
containing Apollo Lake based Pentinum and Celeron SoC. This has
been tested on model UPS-APLP4-A10-0432.
This starts from the minnowboard configuration, and document
from galileo.
Origin: Original
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Charles E. Youse