This file originally added a "nordic,nrf-sw-pwm" node with a few basic
properties that were common to all nRF51 and nRF52 series SoCs. There
is no implementation of SW_PWM available for other nRF series. At the
time this file has been created, there was only nRF91 apart from nRF5x,
but when nRF53 appeared, the name of this file became misleading.
Recent addition of common disabling of the systick node made it clear
that such common file for all nRF SoCs is convenient.
To prevent further confusion, rename this file to nrf_common.dtsi and
keep there only stuff actually common to all nRF series, moving the
SW_PWM related node to particular SoCs that use it (this is actually
consistent with how all other nodes, that also have some properties
common to several or even all nRF SoCs, are defined).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use setting from devicetree to drive the default setting for
CORTEX_M_SYSTICK. We update the dts files to default systick to be
enabled since the major of cortex-m platforms utilize it by default
(except on Nordic SoCs, TI CC13x2/CC26x2 and MEC1501 in which we
default to disabled).
Fixes#25299
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Aliases defined for peripheral nodes in the nRF SoC definitions were
used in drivers to properly match the hardware instances.
After the drivers were converted to use the new DT API, these aliases
became needless.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.
NOTE: For a SoCs with on die flash, this points to the controller and
not the 'soc-nv-flash' node. Typically the controller is the
parent of the 'soc-nv-flash' node).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For quite a few peripherals that are currently supported by nrfx HALs
or drivers there are no definitions of corresponding CMSIS-Core
peripheral accessing symbols that would provide their base addresses
in the proper domain (secure or non-secure), accordingly to the build
target. This commits adds devicetree nodes for these peripherals so
that their base addresses can be used in definitions of the accessing
symbols mentioned above.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A minor spelling fix in an inline comment in
both nRF9160 Secure and Non-Secure .dtsi headers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Several aliases were added to nrf9160[ns].dtsi files solely for
the purpose of getting base addresses of certain hardware modules
via DT_ macros generated for these aliases.
Since for one-instance modules the same can be now achieved with
standard DT_INST_0_* macros, there is no need to keep these aliases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move flash-controller and SRAM node definitions under SoC node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add missing node for instance 0 of the RTC peripheral and use an alias
to the flash-controller node instead of the nvmc node definition (there
is no need to have a separate node just to get the NVMC base address).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit introduces the main device tree header files (.dtsi)
for Nordic nRF9160 SOC, for both Secure and Non-Secure domains.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Andrzej Głąbek