Commit Graph

10 Commits

Author SHA1 Message Date
Andrei Gansari a0f011b2fb dts: lpc devices allocate all gpio interrupts
Allocate all 8 PINT interrupts to ports 0 and 1, allocate 4 to each.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-11-13 12:05:48 -06:00
Andrei Gansari 2e27363e67 dts: NXP LPC gpio updates
NXP's LPC family of MCU's GPIOs parameters is udated.
Boards LPC54xxx and LPC55xxx have updated values according
pin and interrupt layout.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-11-13 12:05:48 -06:00
Piotr Zięcik 7d56fc35fd dts: Add information about CPU frequency to the cpu nodes
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:

- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
  in order to configure USB clock source.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
Kumar Gala 0eb0e78d67 dts: Fix warnings associated with reg/unit-address not matching
Newer DTC now warns about mismatch between the reg and unit-address.
Most of these cases are due to case not matching, so fix thoses so
everything is lowercase.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-10 09:11:58 -05:00
Erwan Gouriou 1ac3517c6a dts: Add missing 'compatible' property in flash base nodes
'compatible' property was missing in flash base nodes for
some .dtsi files. Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-09-21 07:23:49 -07:00
Maureen Helm 9faa26dbc5 dts/nxp: Fix dtc v1.4.6 warning: Node has a unit name, but no reg prop
Adds #address-cells, #size-cells, and reg properties to cpus on the
lpc54xxx soc.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-05-23 15:16:44 -05:00
Stanislav Poboril 5477ee4531 mcux: Add MCUX IPM driver for lpc and kinetis socs
Add driver for MCUX mailbox which can be used for lpcxpresso54114
and other lpc and kinetis socs.

Origin: Original

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-05-17 15:07:48 -05:00
Stanislav Poboril fd4759b5d7 arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4
Rename various SoC related defines and files from just being LPC54114
to LPC54114_M4.  This is in prep for supporting a build for the second
core on the LPC54114 (the Cortex-M0+).

* Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4
* Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4
* Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi
* Moved some pinmux related defines into SoC code.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-05-15 15:49:15 -05:00
Stanislav Poboril 45cfea6f4a board: lpcxpresso54114: Move led and button definitions to dts
Moves the led and button definitions for the lpcxpresso54114 board from
board.h to dts.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-05-15 15:49:15 -05:00
Shiksha Patel 4a892ae81a lpc: Add nxp_lpc soc family to soc directory
Add soc configuration support for lpc soc family, Kconfigs and soc files
for lpcxxx soc.

Add dtsi file for lpc54xxx.

Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-01-23 09:18:32 -06:00