The SMARTDMA is a programmable DMA engine, and supports custom firmware
in order to run complex DMA operations. Update the driver to increase
the flexibility users have when configuring the SMARTDMA with
custom firmware, and remove the RT500 display firmware specific
definitions and functionality from the driver.
This display setup is now handled from the MIPI DSI driver, since the
firmware used for this case is specific to the MIPI DSI IP.
This change also requires an update to the RT500 devicetree, as the
register definition for the SMARTDMA has changed, so the base address
must as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for mipi_dsi_detach API to dsi_mcux_2l driver, and
update RT5xx SOC interface to enable halting clocks for the MIPI DPHY.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allows device tree to enable usage of the controller feature
where HS clock is disabled when not in use, which is good
for reducing power consumption if MIPI DSI is mostly idle.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version of dsi_mcux_2l hardcoded some MIPI DSI
transfers to use high speed mode but others used low power mode.
Now dsi_mcux_2l will use high speed mode by default for all
transfers unless a new msg flag is set to indicate the
transfer must use low power mode. Note that the new flag
is different than the existing MIPI_DSI_MODE_LPM flag, which
so far only applied to cmd messages sent in video mode,
or could be interpreted as for all messages, but would not
allow per message mode control.
This new message flag allows client to control transfer
mode per message transfer.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version hardcoded the SMARTDMA slot to either
RGB565 or RGB565_SWAP, but that would be incorrect
if the pixfmt was RGB888. Use the mipi device
pixfmt to set the slot.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Add support for SMARTDMA transfers, and byte swapping of RGB565 data.
Additionally, the limits on TX data size have been impelemented in the
MIPI DSI driver, as opposed to the RM67162 display where they were
previously added.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fixup support for DCS_LONG_WRITE command in DSI MCUX 2L driver. Since long
DCS commands may benefit from nonblocking I/O, add support for non blocking
transfers to the DSI driver.
This commit also corrects the interrupt number for the RT595, which uses
the DSI_MCUX_2L IP block.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Make DPI mode an optional configuration for the DSI MCUX 2L driver.
DPI mode will only be enabled when the MIPI is attached in video mode,
since this is when DPI formatted packets are expected.
This will enable the DSI driver to also support DBI/command mode, for
displays that use this format.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update MCUX ELCDIF driver to use new LCDIF bindings. This
update also adds support for configuring the root clock of
the ELCDIF module based on the pixel-clock property to the
RT11xx SOC clock init, as this SOC series has this IP block
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update DCNANO LCDIF IP to use shared lcd interface binding. This
requires changes to the RT5xx SOC and RT595 EVK, as this SOC
uses the LCDIF IP, and configures the clock for it based off
the new pixel-clock property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for MCUX MIPI DSI 2L. This IP block differs slightly from
the existing MCUX MIPI peripheral, and uses a different hardware
abstraction layer. For these reasons, a new driver was introduced rather
than extending the existing mcux_dsi implementation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Daniel DeGrasse