zephyr

Commit Graph

Author	SHA1	Message	Date
Martin Åberg	a362463fdf	boards: qemu_riscv64 use virt machine Upgrade board specification to use the VirtIO board. Keeps FPU run-time support disabled since the RISC-V 64-bit FPU support in kernel appears to be non-functional. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>	2021-01-15 13:06:33 -05:00
Nicolas Pitre	7f74825958	riscv: add a qemu_riscv64 board This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board. Memory is tight so a few tests had to be disabled due to the extra memory usage compared to qemu_riscv32. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	2019-08-09 09:11:45 -05:00

Author

SHA1

Message

Date

Martin Åberg

a362463fdf

boards: qemu_riscv64 use virt machine

Upgrade board specification to use the VirtIO board.

Keeps FPU run-time support disabled since the RISC-V 64-bit FPU
support in kernel appears to be non-functional.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>

2021-01-15 13:06:33 -05:00

Nicolas Pitre

7f74825958

riscv: add a qemu_riscv64 board

This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>

2019-08-09 09:11:45 -05:00

2 Commits