Commit Graph

3934 Commits

Author SHA1 Message Date
Yves Vandervennet 6f8ee2cdf7 flash: nxp: removal of deprecated binding nxp,lpc-iap
The binding 'nxp,lpc-iap' is no longer used, which is confirmed
by running:

$ find ${ZEPHYR_BASE}/dts/arm/nxp -type f | egrep -e '\.dts(i)*$' | \
  xargs grep -nH nxp,lpc-iap

Changes in this commit:
 - remove DT_HAS_NXP_LPC... in drivers/flash/Kconfig.mcux
 - remove schema file for nxp,lpc-iap

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-16 13:45:08 -05:00
Yves Vandervennet da3d0b3492 flash: nxp: updating drivers, Kconfig and device trees with new bindings
The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings
introduced in the previous commit. The drivers' Kconfig files also
reflect this change (DT_HAS_ENABLED_NXP_...).
The SoC device trees are updated with the new bindings

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-16 13:45:08 -05:00
Yves Vandervennet f8ae84df84 dts: bindings: introducing new bindings for NXP's on-chip flash controllers
The binding 'nxp,iap-lpc' is used for different flash controllers,
preventing clarity. This commit introduces bindings for each version of
the flash controller, as they appear with NXP lpc device families:

nxp,iap-fmc11: for the flash controler used on the lpc11u6x family
nxp,iap-fmc54: for the flash controler used on the lpc54xx family
nxp,iap-fmc55: for the flash controler used on the lpc55xx family,
   except lpc553x
nxp,iap-fmc553: for the flash controler used on the lpc553x family

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-16 13:45:08 -05:00
Declan Snyder 85359df09b dts: Renamed NXP usdhc in imxrt6xx
The names of these peripherals in the device tree
did not match the Reference Manual for the RT600.

Added alias for usdhc0 to be able to use SDHC test.

Also fixed a typo in a comment referring to USDHC which should have been
about USB.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-16 13:43:16 -05:00
Felipe Neves a5379b71f8 drivers: ipm: ipm_esp32: remove hardcoded nodelabels
by making shared memory property  of IPM binding.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves 4bff7ecab3 drivers: ipm: esp32: added IPM driver
implemented by software for esp32 dual core
variants.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Pieter De Gendt c0938ebc47 dts: sam4e: Add SMC peripheral
Add pinctrl definitions for the SMC peripheral (8) and add the
module to the sam4e soc.

IDs and addresses are taken from the datasheet.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Pieter De Gendt f3ad30c048 dts: sam4s: Add SMC peripheral
Add pinctrl definitions for the SMC peripheral and add the module
to the sam4s soc.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Pieter De Gendt e328c2bb7d drivers: memc: Introduce Atmel SAM SMC/EBI driver
Add a driver to support external memory connected to the SMC port
for Atmel SAM devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Pieter De Gendt 7ef643385b soc: arm: atmel_sam: sam4s: add support for sam4sa16c
Add soc support for sam4sa16c variant

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Andreas Sandberg a43fd92c4e drivers: ssd16xx: Make SSD1673 registers optional
The SSD16xx driver currently hard-codes a couple of register overrides
that aren't relevant or even correct for many devices. Make them
optional device tree properties instead.

Note that this changes the behavior for panels that expect
SSD16XX_CMD_DUMMY_LINE and SSD16XX_CMD_GATE_LINE_WIDTH to be set by
the driver. This fixes a bug where the incorrect value
was written to all SSD16xx panels except for GDEH0213B1 and GDEH029A1.

The overlay files for devices that need dummy line and gate line width
to be specified have been updated as a part of this commit.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-08-16 11:32:26 +02:00
Andreas Sandberg 532ab8c13d drivers: ssd16xx: Make voltage overrides optional
The OTP in most SSD16xx-based displays normally contain default
VCOM/GDV/SDV values. Make all of these optional in the device tree.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-08-16 11:32:26 +02:00
Yves Vandervennet 7a4bb3b27c can: nxp: enabling MCAN on NXP's lpcxpresso55s36
This commit introduces

 - changes on SoC Kconfig and dts files
 - board specific changes (CAN node status, pinctrl and Zephyr alias)

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-15 13:37:38 -05:00
Wolfgang Puffitsch f981652dba dts: Include Kconfig.dts as optional source
Avoid build errors for platforms that do not support devicetree and
hence do not generate a Kconfig.dts.

Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
2022-08-15 11:10:51 -07:00
Jordan Yates 2df6ac09de bluetooth: hci: spi: minimum reset duration
Add the option to specify the minimum duration that the `reset-gpios`
pin is held low on boot. This lets devices with additional capacitance
on the reset line still reboot the Bluetooth controller.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-08-15 14:33:01 +02:00
John Kjellberg 6076991fdb drivers/disk: sdmmc: Add DMA support.
This fixes underrun issues when hardware flow control can't be used.

Only tested on STM32F4.

Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>

...
2022-08-15 14:31:35 +02:00
Kumar Gala 01c4e02240 kscan: sdl: Convert driver over to devicetree
Move kscan SDL driver to be based on devicetree.  This is similar to
how the display SDL driver works.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 17:54:03 -05:00
Navin Sankar Velliangiri 0facbebee9 dts: LPC51U68 Initial device tree
Create device tree for LPC51U68 MCU

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-08-12 16:15:42 -05:00
Kumar Gala 89f356a0ff peci: ite_it8xxx2: Rename compatiable to match other compatiables
All the of the ITE it8xxx2 devicetree compatiables are of the form
ite,it8xxx2-<DEV>.  However the PECI device was ite,peci-it8xxx2,
rename the compatiable to match the pattern used everywhere else.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 14:16:59 +01:00
Gerard Marull-Paretas 13a071ea74 dts: arm: gigadevice: initial support for gd32e507x
Add initial support for GD32E507X, part of the GD32E50X series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-12 14:13:49 +01:00
Alex Tsamakos 736255d134 boards: actinius_icarus: add support for hardware version v2.0
Add support for the new hardware version of the Icarus IoT Board.

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2022-08-12 14:13:22 +01:00
Kumar Gala 8d2cbc639c flash: nios2_qspi: Add dts binding and nodes for NIOS2 QSPI flash
Add dts bindings for the NIOS2 QSPI controller and flash device and
add nodes to the dts files for these devices as well.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 08:11:42 -04:00
Sylvio Alves a41f4f30b5 driver: esp32: add wifi binding
Binding yaml file was missing.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-08-11 18:59:26 -05:00
Declan Snyder 1a8b700a81 dts: arm: nxp: Added MCUX CAAM on rt11xx.dtsi
Added nxp,imx-caam binding
Enabled CAAM in rt11xx devicetree

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-11 17:14:43 -05:00
Daniel Leung df3093a3e7 dts: dai: correctly rename intel,dai-dmic.yaml
Fat finger mis-typed when I renamed the file last time.
So correctly name the file this time. Hopefully this is
correct and won't need anymore renaming... :(

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-08-11 16:14:25 -05:00
Gerson Fernando Budke 9562e3f794 drivers: flash: sam: Fix driver support
The current atmel sam flash driver was develop based on the cortex-m7
version of smart arm microcontroller. The driver support write
protection and cache functions which is not supported by other cortex-m
variants. This fixes current driver implementation and devicetree
entries for all sam variants.

Notes:
 * The cortex-m3 doesn't have support erase pages flash command and
   because of that the driver still not not compatible. Keep it disabled
   until a patch be send. The hwinfo driver is not affected by this
   restriction.
 * The sam4l variation requires a specific driver because uses another
   flash controller (flashcalw). Added another compatible to
   differentiate and keeped node disabled until a driver be available.

Fixes #48516

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-08-11 07:41:09 -05:00
Kumar Gala cd04cdac1e dts: nxp: kw41z: Fix typo in 802.15.4 device compatible
The ieee802.15.4 node had a typo in the compatible.  Also remove
the label property as its not needed.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-11 02:37:55 -05:00
Wojciech Slenska aebd68ea41 drivers: counter: stm32u5 family compatibility
In STM32U5X family there is no EXTI line for RTC.

Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
2022-08-11 07:24:27 +01:00
Daniel Leung b076aa373a dts: bindings: fix intel,dai-misc
() Fix the compatible string from "intel,dai,dmic" to
   "intel,dai-dmic".
() Also rename the yaml file to have vendor name first.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-08-10 13:35:18 -07:00
Krzysztof Frydryk 8dd57467cc drivers: dai: Enable Zephyr runtime power mgmt in Intel SSP driver
Enable Zephyr device runtime power management mechanisms in Intel SSP
driver. This allows Zephyr to track usage reference for power
domain gating.

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-08-10 11:58:45 +02:00
Krzysztof Frydryk 078de4e021 power_domain: Intel ADSP: Add power gating mechanism for Intel ADSP devices
This adds power domain gating mechanisms for Intel ADSP devices.

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-08-10 11:58:45 +02:00
Krzysztof Frydryk cbeebe5db6 dts: ace1x: Add lps address
Add lps address to ace 1.x devicetree.

Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-08-10 11:58:45 +02:00
Gerard Marull-Paretas fce17ba226 dts: remove unused IEEE 802.15.4 labels
Labels are no longer needed because devices are obtaines using
zephyr,ieee802154 DT choice.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-10 11:57:34 +02:00
Gerard Marull-Paretas 8f887b6f8a tests: subsys: openthread: refactor test
Use a test compatible so that test can create a DT-based device and
provide a valid choice when building the test.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-10 11:57:34 +02:00
Gerard Marull-Paretas 846bed99c3 boards: enable IEEE 802.15.4 devices and add choice
Enable the IEEE 802.15.4 radio node on all boards that listed
'ieee802154' in the supported field.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-10 11:57:34 +02:00
Pete Dietl c93361a5bf dts: arm: st: g4: add missing fdcan2 clock
Commit 783bc9db26 made
the clocks propery required, but forgot to add the property
for can instance 2.

Signed-off-by: Pete Dietl <petedietl@gmail.com>
2022-08-10 09:40:14 +01:00
XiNGRZ Chan 7109632046 drivers: spi_esp32_spim: Add support for IOMUX mode
In order to work on a clock speed higher than 20 MHz, IO MUX is required.

Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
2022-08-09 12:31:23 +02:00
Kumar Gala bb7854d79d dts: bindings: microchip: Remove unused cell related bits
various microchip bindings set 'girq-cells' and 'pcr-cells'
sections in the bindings.  However the bindings where for the
client nodes and thus do not need to set these.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-09 12:29:41 +02:00
Erwan Gouriou de24268136 dts: bindings: clocks stm32: Clock selection rewording and clarification
Change the wording about "alternate/optional" clock to "domain" clocks,
to better describe the feature and minimize confusion.

Additionally, provide more  description about domain clocks and dual
domain functionality implemented in peripherals.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-08 14:17:07 +02:00
Lucas Tamborrino ca9126fa81 dts: esp32/s2: add bindings to pcnt peripheral
Add pcnt node to esp32 and esp32s2.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-08-08 10:51:41 +02:00
Bryce Wilkins 5ff80ef2b1 drivers: spi: Add default char to mcux flexcomm spi driver
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.

I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2022-08-05 09:28:39 -05:00
Andriy Gelman af6179d567 drivers: gpio: Add xmc4xxx drivers
Adds gpio drivers for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-08-05 13:00:21 +02:00
Jay Vasanth 8014a026d1 drivers: eeprom: MEC172x - Add read/write APIs support
Add functions to support EEPROM read and EEPROM write.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-08-04 18:36:18 +02:00
Jay Vasanth ccb77af3b7 eeprom: Add Microchip eeprom driver skeleton
Prepare for Microchip eeprom driver addition. Update
dtsi, kconfig, cmake and relevant soc files for eeprom
driver addition.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-08-04 18:36:18 +02:00
Yves Vandervennet cd7dbe92b1 soc: arm: nxp_lpc: lpc55xxx: disabling LPC55S36 IAP support
This is temporary until support has been enabled. lpc55s36's IAP controller
is different and does not match previous implementations.
The Zephyr driver uses a data structure matching the IAP controller to
implement a feature that should normally come out of the ROM.

Since IAP support is not in yet, disabling the option in the SoC's Kconfig
and disabling the node in the device tree is the proper way to go forward.

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-04 10:47:16 -05:00
Neil Chen 91f3ffb69b dts: arm: nxp: Add dtsi for LPC55S36
The default RAM configuration for LPC55S36:
- sramx 0x4000000  16K
- sram0 0x20000000 16K
- sram1 0x20004000 16K
- sram2 0x20008000 32K
- sram3 0x20010000 32K
- sram4 0x20018000 16K

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2022-08-04 10:47:16 -05:00
Daniel DeGrasse f7f94dd367 drivers: pinctrl: update lpc iocon to support LPC55s3x
LPC55s3x family has an additional analog mode bit available. Update
IOCON binding and IOCON driver to support setting this bit via a pin
control property.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-04 10:47:16 -05:00
Gerard Marull-Paretas e6a345f967 drivers: ieee802154: uart_pipe: make driver DT-based
Use Devicetree to describe the UART UPIPE IEEE 802.15.4 driver. This
allows to remove usage of IEEE802154_UPIPE_DRV_NAME in preparation for
the removal of NET_CONFIG_IEEE802154_DEV_NAME.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-04 13:25:35 +02:00
Gerard Marull-Paretas 2df965f490 drivers: ieee802154: nrf5: make driver DT-based
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_NRF5_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME.

All SoC files have been updated with the addition of an ieee802154 node
(disabled and only on those SoCs that define ieee802154-supported. The
peripheral has been enabled in the nRF52840DK board (used for testing
ieee802154).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-04 13:25:35 +02:00
Gerard Marull-Paretas 7d5272db62 drivers: ieee802154: kw41z: make driver DT-based
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_KW41Z_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.

KW41Z files have been updated with the addition of radio and an
ieee802154 nodes The peripheral has been enabled in the frdm_k41z board
(used for testing ieee802154).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-04 13:25:35 +02:00