Commit Graph

2601 Commits

Author SHA1 Message Date
Ioannis Glaropoulos 059952c8e1 arch: arm: update compile options for DSP
This commit updates the compile options in cmake to distinguish
between ARMv8-M Mainline MCUs with or withouth the optional DSP
extension. A new Kconfig option: ARMV8_M_DSP, is introduced, to
signify the use of an ARMv8-M MCU with DSP support.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-03 12:17:13 -05:00
Piotr Zięcik 97adff57f1 arch: arm: nrf: Enable SEGGER RTT on all Nordic SoCs
All chips from nRF51 and nRF52 series support Segger RTT,
so we can enable it if given series is used.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-07-03 17:51:50 +02:00
Ioannis Glaropoulos e325510d59 arch: arm: nrf: minor header files' clean up in soc/nrfx
This commit cleans up source files in soc/nrf51 soc/nrf52
folders by removing unnecessary header inclusions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-02 16:50:10 +02:00
Ioannis Glaropoulos 0677812910 arch: arm: nrf: remove kernel_includes.h from nRF5x soc.h inclusions
This commit removes the inclusion of kernel_includes.h from
the nRF51 and nRF52 soc.h headers. This prevents from an
inclusion cycle formation on soc.h. In the wake of
kernel_includes.h removal, necessary header files have been
added in several source files to be able to compile Zephyr for
nRF5x SOCs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-07-02 16:50:10 +02:00
Anas Nashif bebda565b5 clang: fix for x86 iamcu
Clang, build IAMCU with -miamcu.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-01 22:58:09 +02:00
Anas Nashif 72edc4e15f clang/llvm: add initial configuration file for clang
Add an LLVM backend and a clang toolchain variant to support building
with llvm coming with popular Linux distributions.

This has been tested with X86 boards:
- quark_d2000_crb
- quark_se_c1000_devboard/Arduino 101

Use:

export ZEPHYR_TOOLCHAIN_VARIANT=clang

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-01 22:58:09 +02:00
Ioannis Glaropoulos 7c9a1f0f76 arch: arm: soc: add explanatory comment for kernel headers' inclusion
This commit adds an explanatory comment in all soc.h headers,
where kernel_includes.h header has been included, to stress out
that this header must be included after SOC-specific headers are
brought in. The reason is the fact that kernel_includes.h needs
the ARM CMSIS definitions, which are brought in by the
SOC-specific header inclusions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-29 17:53:15 -05:00
Aurelien Jarno fa83a4d131 arch: arm: stm32f7: remove core zephyr header inclusions from soc.h
The stm32f7 version of soc.h misses the changes done in commit
aee97be710 ("arch: arm: soc: remove core zephyr header inclusions
from soc.h") as it was not merged at that time. Fix that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-29 11:52:51 -05:00
Alberto Escolar Piedras 2889f5f02c native: Do not ignore format-truncation warnings
Reverting 5124711d87
as issue #5732 is no more.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-28 19:58:55 +02:00
Kumar Gala e860775873 Revert "arch: arm: stm32: correct include issue"
This reverts commit 30529da0e4.

We should include SoC headers from HALs before we include
kernel_includes.h.  On ARM this is needed because we tend to get CMSIS
related defines setup by the HAL headers.

Fixes: #8593

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-06-28 10:54:38 -05:00
Yurii Hamann 1fdc790ca2 serial: stm32: STM32F7 UART support
The patch adds serial driver support for STM32F7 family
microcontrollers, includes pinmux definitions and DTS fixup file.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann a229500d23 drivers: gpio: stm32: STM32F7 GPIO support
This patch adds GPIO support for STM32F7 family microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann cfb25c74a0 drivers: flash: stm32: STM32F7 flash memory suport
Added flash memory support for STM32F7 family microcontrollers

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann 4df673f3fc drivers: clock_control: STM32F7 family clock control
This patch adds clock control support for STM32F7 family
microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann 7d8d280db3 arch: arm: stm32: Basic STM32F7 family support
The patch includes support for STM32F746xG subfamily.
Related to issue #6981.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
qianfan Zhao e7205be03d arch: stm32: Enable HAS_SEGGER_RTT on all stm32 SoCs
Enable HAS_SEGGER_RTT to allow user to select use of SEGGER RTT
and SystemView solution.

SEGGER provide a firmware that can convent ST-Link to J-Link,
And RTT is supports all stm32 SoCs, so lets enable RTT default

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-06-27 15:48:38 -05:00
Andrew Boie 8bcffefb33 arch: arm: clean up MPU code for ARM and NXP
* We are now *much* better at not reserving unnecessary
system MPU regions based on configuration. The #defines
for intent are now an enumerated type. As a bonus, the
implementation of _get_region_index_by_type() is much
simpler. Previously we were wasting regions for stack guard
and application memory if they were not configured.

* NXP MPU doesn't reserve the last region if HW stack
protection isn't enabled.

* Certain parts of the MPU code are now properly ifdef'd
based on configuration.

* THREAD_STACK_REGION and THREAD_STACK_USER_REGION was a
confusing construction and has now been replaced with
just THREAD_STACK_REGION, which represents the MPU region
for a user mode thread stack. Supervisor mode stacks
do not require an MPU region.

* The bounds of CONFIG_APPLICATION_MEMORY never changes
and we just do it once during initialization instead of
every context switch.

* Assertions have been added to catch out-of-bounds cases.

Fixes: #7384

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-06-27 12:56:38 -07:00
Christophe Priouzeau 30529da0e4 arch: arm: stm32: correct include issue
This commit correct the issue introduce by aee97be which
changed the order of header inclusion that lead
to warning generation at compilation, that truend into errors
in CI.
This commit reinstantiate the initial header inclusion order.

Fixes #8563
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
2018-06-27 12:35:27 -05:00
Ulf Magnusson f1f1fb41bd arch: arm: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Also simplify the definition of CC3220SF_DEBUG. 'default's can be other
symbols too, not just literal values. The condition for the symbol to be
visible (user-configurable) can be put directly on the prompt as well.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson f428d8dacf arch: arc: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Also fix the 'default' on XIP. Due to Zephyr's prefer-later-defaults
behavior, it was always set to 'y' (when the dependencies were
satisfied).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson 8cb6fb7223 arch: xtensa: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson b0156b2c48 arch: nios: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson 81d61601a8 arch: riscv32: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson 87ecbe7f48 arch: x86: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Ulf Magnusson aed5e360ee arch/Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-26 11:07:57 -05:00
Sebastian Bøe a1e806bf44 gen_isr_tables: Delete the dead code accompanying .intList.num_isrs
intList has been populated with the number of isrs, aka interrupts,
but nothing has not been using this information so we drop it and
everything used to construct it.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-25 12:54:49 -07:00
Carles Cufi 0f6bd5c891 arch: arm: nrf: Add support for the nRF52810
The nRF52810 is a low-cost variant of the nRF52832, with a reduced set
of peripherals and memory. This commit adds basic support for it in the
arch SoC and dts folders.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Ioannis Glaropoulos <ioannis.glaropoulos@nordicsemi.no>
2018-06-25 19:34:33 +02:00
Maureen Helm 54d1a608ff imxrt1050: Disable low-power modes
The imxrt1050 is configured to use SYSTICK for the kernel timer, but
SYSTICK cannot wake up the soc from low-power modes. Disable low-power
modes on this soc until we have support for an alternative timer.

This fixes k_sleep on the EVKB version of the mimxrt1050_evk board. An
earlier version of the board (EVK, not EVKB), had A0 silicon which
by default did not enter low-power mode on a wfi.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-06-23 11:00:20 +02:00
Johann Fischer c36e800e8e usb: remove all CONFIG_*_EP_ADDR options
Remove all CONFIG_*_EP_ADDR options but keep the default
values for it, as they are necessary to find ep_addr in
usb_ep_cfg_data associated with bEndpointAddress in
interface descriptor.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-06-22 12:30:55 -04:00
Ioannis Glaropoulos aee97be710 arch: arm: soc: remove core zephyr header inclusions from soc.h
This commit removes the direct inclusions of device.h or gpio.h
from soc.h header files in ARM SOCs, to avoid soc.h include
kernel.h.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-21 22:28:00 +02:00
Bartosz Sokolski 92778e4438 arch: soc: nrf52: add UART1 to dts fixup
Current fixup supports only UART0 while there is also UART1

Signed-off-by: Bartosz Sokolski <bartosz.sokolski@nordicsemi.no>
2018-06-21 13:49:13 +02:00
Sebastian Bøe aed0b6c4bd isr_tables: Simplify how the sw_irq_handler function is used
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

It is equivalent to the simplification that was done with
_irq_spurious here:
https://github.com/zephyrproject-rtos/zephyr/pull/7574

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-20 15:39:29 -04:00
Joakim Andersson 5204fd7061 arch: arm: Set Zero Latency IRQ to priority level zero:
Set Zero Latency IRQ to priority level zero and SVCs to priority level
one when Zero Latency IRQ is enabled.
This makes Zero Zatency truly zero latency when the kernel has been
configured with userspace enabled, or when IRQ offloading is used.

Exceptions can still delay Zero Latency IRQ, but this is considered
ok since exceptions indicate a serious error, and the system needs to
recover.

Fixes: #7869

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2018-06-20 18:05:02 +02:00
Karol Gugala 1765d75ff4 riscv32: riscv-privilege: Microsemi Mi-V support
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Karol Gugala 23a5b5d171 riscv32: riscv-privilege: integrate common code
This commit moves code from fe310 platform into RISC-V privilege common
folder. This way the code can be reused by other platforms in future.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Mieszko Mierunski dc1c2742b6 boards: nrf: Moved SDA and SCL pin configuration to DTS for nRF boards
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Stanislav Poboril 631eedd334 arch: Add imx6sx m4 soc support
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-06-19 17:08:51 -05:00
Sebastian Bøe 8f321b48ac isr_tables: Simplify how the spurious irq function address is found
Instead of finding the address of the spurious irq function in the
intList section we now rely on the linker to find the address in the
_irq_spurious symbol.

This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

In this specific case it makes the generated code 'irq_tables.c'
easier to read as we replace magic numbers with the &_irq_spurious
token.

Also, the path through the build system that _irq_spurious makes is
much shorter, so it is much easier for a user to understand how it is
used.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-19 13:46:35 -07:00
Ioannis Glaropoulos bf15988510 arch: arm: beetle: duplicate CMSIS MPU-related macros
Duplicate the CMSIS MPU-related macro definitions specifically
for Beetle SOC which is is not compliant with ARM CMSIS and
does not include the ARM CMSIS headers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos 1547abb57d arch: arm: use CMSIS defines for MPU_RASR register bit setting
This commit removes the macro definitions for MPU_RASR register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos 8d52c17166 arch: arm: use CMSIS defines for MPU_RBAR register bit setting
This commit removes the macro definitions for MPU_RBAR register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Ioannis Glaropoulos 0a41e23ac0 arch: arm: use CMSIS macro defines for MPU_CTRL register bit setting
This commit removes the macro definitions for MPU_CTRL register
bitmasks, defined in arm_mpu.h, and modifies the MPU driver to
directly use the equivalent macros defined in ARM CMSIS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-19 15:18:58 -05:00
Jakub Rzeszutko eb84eff27f arch: arm: nrf: modification of config parameter: SOC_SERIES_NRF52X
Configuration parameter SOC_SERIES_NRF52X is common for all NRF5X SoCs.
Due to that it cannot select: CPU_HAS_FPU because not all Nordic
microcontrollers supports that. Selection of this parameter was moved
to configuration of each SoC in Kconfig.soc file.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-06-19 20:02:51 +02:00
Jakub Rzeszutko 1fa9d84332 arch: arm: nrf: add hardware description for nrf Kconfig files
Created NRF5x peripheral list that can be used to describe each
NRF5x SoC. Basing on this description Kconfig file can display
and allow to configure only these drivers that are available
for particular SoC.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-06-19 20:02:51 +02:00
Andrzej Głąbek 687355c9af arch: arm: nrf: Use SystemInit() from MDK in SoC initialization
Replace code that handles erratas and performs other SoC-specific
initialization, that was actually copied from SystemInit() provided
in MDK for particular SoCs, with a call to SystemInit().

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-06-19 14:25:39 +02:00
Alex Tereschenko 3c1a78ea0d cmake: replace PROJECT_SOURCE_DIR with ZEPHYR_BASE
Both variables were used (with the same value) interchangeably
throughout CMake files and per the discussion in GH issue,
ZEPHYR_BASE is preferred.

Also add a comment with explanation of one vs. the other.

Tested by building hello_world for several boards ensuring no errors.

Fixes #7173.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
2018-06-18 15:25:55 -04:00
Aurelien Jarno 7688f49065 drivers: usb_dc_stm32: change all endpoints to bidirectional
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.

This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:

    #define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                       CONFIG_USB_NUM_IN_ENDPOINTS)

    #define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                        CONFIG_USB_NUM_OUT_ENDPOINTS)

    #define NUM_BIDIR_EP NUM_OUT_EP

This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.

In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-18 15:24:15 -04:00
Alexander Wachter c601f3be67 can: Add can support for STM32L432
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alex Tereschenko 0824ec6409 dt: nrf52840: remove 0x from USBD address
The prepended 0x causes DTC warnings and shouldn't be there.

Tested by compiling hello_world for nrf52840_pca10056 before and after.

Fixes #8334.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
2018-06-16 18:00:56 +02:00
Ioannis Glaropoulos 7a864bb79b arch: arm: define and implement ARM IRQ target state API
This commit contributes the definition and the implementation
of an API for ARM MCUs to configure and get the configuration
of the security state targeted by a given external IRQ line.
The API is only available in Secure ARM Firmware.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-15 15:53:11 +02:00