zephyr

Author	SHA1	Message	Date
Chen Xingyu	3f7e73416d	soc: riscv: privileged: efinix-sapphire: Enable CONFIG_RISCV_HAS_CPU_IDLE In an earlier commit, the riscv-privileged level implementation of `arch_cpu_idle()` is not included unless `CONFIG_RISCV_HAS_CPU_IDLE` is enabled. This commit ensures the option is enabled on all the existing CPUs, thereby maintaining the existing behavior. Signed-off-by: Chen Xingyu <hi@xingrz.me>	2023-11-28 15:34:06 +01:00
Torsten Rasmussen	10fea41f5c	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable This commit updates all riscv SoCs to set SOC_LINKER_SCRIPT CMake variable to point to active linker script directly. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>	2023-11-03 11:01:23 +01:00
Yong Cong Sin	84b86d9b0c	soc: riscv: Add ability to use custom sys_io functions Add Kconfig RISCV_SOC_HAS_CUSTOM_SYS_IO symbol so that a riscv SoC can set to specify that it has a custom implementation for sys_io functions. Signed-off-by: Yong Cong Sin <ycsin@meta.com>	2023-07-26 09:43:59 +02:00
Manojkumar Subramaniam	6e887e3f61	soc: riscv: Add initial support for Efinix Sapphire SoC - It's a riscv privilege spec SoC Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>	2023-06-27 12:09:57 +00:00