There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.
() Removes the x86_64:x32 architecture and SoC, and replaces
them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Minnowboard and ACRN do not use the new APIC timer, so the
benchmark code will not run on them (yet).
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
These all currently use the HPET timer, and thus can't build with
BOOT_TIME_MEASUREMENT enabled, so disable for now. This test is
basically a build-only test, so we're covered with the other x86
targets (gpmrb, up_squared) for now.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This test can also be run in ARCH_POSIX
+
added a filter in the test yaml so it does not float fault
with too low HW frequencies
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Enabled the boot_time test on ARM SoCs, set __start_time_stamp on ARM
since we don't have a free running counter similar to TSC on x86.
Also moved to printing the values out as %u to increase the range of
values.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will prepare test cases and samples with metadata and information
that will be consumed by the sanitycheck script which will be changed to
parse YAML files instead of ini.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>