Commit Graph

13 Commits

Author SHA1 Message Date
Charles E. Youse 3038209695 drivers/timer/hpet.c: migrate to devicetree
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.

Fixes: #18657

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-17 22:37:09 +08:00
Kumar Gala 343e16026e dts: x86: shring ioapic register size to 4k
Previous the register size was 1M, technically the there are only a
small handful of registers defined in the IOAPIC, so shrinking the size
to 4k, so its as most one page large.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-05-22 12:38:20 -04:00
Kumar Gala e7cc51094a dts: x86: Move ioapic node out of cpu container
The IOAPIC node shouldn't have been in the cpu container, especially
since the cpu container does:

	#address-cells = <1>;
	#size-cells = <0>;

So the reg field of the IOAPIC would be treated as 2 registers instead
of a register and size.  Move IOAPIC node out of the CPU node fixes this
issue.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-05-22 12:38:20 -04:00
Erwan Gouriou 1ac3517c6a dts: Add missing 'compatible' property in flash base nodes
'compatible' property was missing in flash base nodes for
some .dtsi files. Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-09-21 07:23:49 -07:00
Kumar Gala e4a96ccbc4 dts: Cleanup warnings associated with unit_address_format and leading 0s
We get several warnings of the form:

	Warning (unit_address_format): /soc/uart@000003f8:
	unit name should not have leading 0s

Fix these by remove the leading 0s.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-18 10:43:58 -07:00
Kumar Gala 6e240da26f dts: Use new DT_SIZE_{K,M} macros
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere.  We also have DT_SIZE_M, so use that in a few
places as well.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-15 09:23:07 -05:00
Tomasz Bursztyka 61ef30d10e drivers/uart: Use dts to set uart options for ns16550 driver
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 8bbb80e308 dts/x86: Fix UART nodes for ia32, atom and quark_x1000
Base addresses and some IRQ numbers were wrong.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka e4aced513d dts/x86: Enable generating the IRQ priority on all SoCs
Now that IOAPIC descriptor supports it, let's use it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka 9e1f1acc24 dts/x86: Add Copyright headers to x86 dtsi files
All were missing it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Yannis Damigos 398a5a4fc2 dts: dtc v1.4.6 warnings: Fix warning for leading 0s
Fixes the following warnings:
Node unit name should not have leading 0s

Fixes #7155

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-04-26 03:00:42 +05:30
Savinay Dharmappa 54239d50a4 dts: x86: Add interrupt controller node
patch adds interrupt controller node and interrupt
property for device nodes.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-12-15 11:22:55 -06:00
Savinay Dharmappa d77e6581e9 dts: x86: Add device tree support for atom based devices
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-11-24 10:10:47 -05:00