Commit Graph

7 Commits

Author SHA1 Message Date
Kumar Gala ccad5bf3e3 drivers: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.

Jira: ZEP-2051

Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 10:06:48 -05:00
Kumar Gala 043b006c0f clock_control: nrf5_power: Use CMSIS NVIC APIs directly
Convert driver to use the CMSIS NVIC APIs rather than the internal ones
so we can remove them in the future.

Change-Id: I7bf3024ea4baf61f1e42bbbd5e4b0abfc6c04e6b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:55 -06:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Andrew Boie 0b474eef9c kernel: deprecate old init levels
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.

New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.

Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.

Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 17:59:44 +00:00
Marcus Shawcroft fece918846 drivers/nrf5_power_clock: Make driver_api structure const.
Change-Id: Ibac214beb850b74746b5315695beb543a7c0bd76
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-25 18:45:22 +00:00
Ricardo Salveti 69b9451af1 arm/nordic: use a common header for the nrf51/nrf52 SoC families
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.

Also switch the controller, uart and clock drivers to use the common
header definitions.

Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-22 01:25:54 +00:00
Vinayak Chettimada 5843e8df89 drivers: clock_control: Add nRF5x Series SoC clock driver
In the Nordic Semiconductor's nRF5x series SoC clock control
system can source the system clocks from a range of internal or
external high and low frequency oscillators and distribute them
to modules based upon a module’s individual requirements.
In this commit the implementation adds support for 16MHz
peripheral clock, 32.768 kHz RC oscillator, and 32.768 kHz
crystal oscillator clock sources.

16MHz peripheral clock is required to use the 2.4GHz Radio
peripheral. 32.768 kHz RC or crystal oscillator clock source
is required to use the real time counter peripheral.

Jira: ZEP-896

Change-id: I1a1e22322a5a26b587f3e27bb979e6296987ac1c
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
2016-10-18 13:03:41 +00:00